Signametrics
36
Switch Settings
S6 S5 S4
Trigger Output Routing
0 0 0
Disables trigger output
0 0 1
PXI_TRIG1
0 1 0
PXI_TRIG2
0 1 1
PXI_TRIG3
1 0 0
PXI_TRIG4
1 0 1
PXI_TRIG5
1 1 0
PXI_TRIG6
1 1 1
PXI_STAR
4.11.4.2 PXI Trigger Inputs
The trigger input to the DMM is the wired-ored signal of the trigger input from the DIN-7 connector and
the PXI bus trigger. Make sure that no signal is connected to the DIN-7 trigger input while the PXI trigger
is in use. When using the DIN-7 trigger input make sure the the trigger input select switches are set to
Disabled position, or the selected PXI Trigger input is at a logic low level. Read about the operation of the
External Hardware trigger in the above sections, since that operation pertains to both, the external and
the PXI trigger input operations. The Trigger input is selected using S1, S2, and S3 DIP switch located
near the J2 connector of the DMM. The DMM trigger input may be selected from any of the following
lines.
Switch Settings
S3 S2 S1
Trigger input Routing
0 0 0
Disables trigger input *
0 0 1
PXI_TRIG1
0 1 0
PXI_TRIG2
0 1 1
PXI_TRIG3
1 0 0
PXI_TRIG4
1 0 1
PXI_TRIG5
1 1 0
PXI_TRIG6
1 1 1
PXI_STAR
* - Rev-B hardware and above.
4.12 Frequency and Timing Measurements (SMX2042, 44)
While the maximum RMS reading is limited to the set range, you can use most of the timing functions even if the
RMS voltage reading indicates Overrange. This is true as long as the input peak-to-peak value does not exceed 5.75
times the selected range ( 5.75 x 330 mV = 1.9 V p-p with the 330 mV range).
4.12.1 Threshold DAC
All timing measurements utilize the AC Voltage path, which is AC coupled. You need to select the appropriate
ACV range prior to using the various frequency and timing measurement functions. The SMX2044 have a novel
feature to accurately make these measurements for all waveforms. Unlike symmetrical waveforms such as a sine
wave and square wave, non-symmetrical waves may produce a non-zero DC average at the frequency counter’s
comparator input. Other DMMs have the comparator hard-wired to the zero crossing. The SMX2044 include a
bipolar, variable Threshold DAC for improved performance of these measurements. The Threshold DAC allows the
internal timing comparator to trigger at a specific DC level. Functions affected by the Threshold DAC include
frequency, period, pulse-width, duty-cycle, and the totalizer.
The Threshold DAC has 12 bits of resolution. Depending on the selected ACV range, this bipolar DAC can be set
from a few mV to effectively several hundred volts (referred to the input of the DMM), positive or negative. See the
Specifications sections for the limits of AC Median Value measurements and Threshold DAC settings.
The best setting of the Threshold DAC is based on the AC Median Value and Peak-to-Peak measurement
described
earlier. For example, a 5 V logic signal with 10% duty cycle will result in median value of 2 V, whereas a 90% duty
cycle signal will have a –2 V median value. Setting the Threshold DAC to the appropriate median value will result
in reliable and accurate timing measurements in each case.
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