SIGNALCORE SC5507A Page 40 Hardware Manual Download | Manualshive

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©2019

Rev 1.0

39

Revision Table

Revision Table

Revision

Revision Date

Description

0.1

2/26/2019

Document Created

1.0

5/16/2019

Initial Release

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Summary of Contents for SC5507A

Page 1: ... 2019 SignalCore Inc All Rights Reserved Hardware Manual SC5507A SC5508A PSG DC 6 25 GHz RF Signal Source With Sensor www signalcore com ...

Page 2: ... Configuring the PSG Device 7 Front Interface Indicators and Connectors 7 Signal Connections 7 Device LED Indicators 8 Communication and Supply Connection 8 Mini USB Connection 9 Reset Button Pin Hole 10 3 Theory and Operation 10 RF Generation 11 Amplitude Control 11 Computational Time 11 RF Power Sensor 11 Internal EEPROM 12 Modes of RF Generation 12 Sweep Function 12 List Function 12 Sweep Direc...

Page 3: ... Register 0x0B Reserved 21 Register 0x0C LIST_BUFFER_POINTS 3 Bytes 21 Register 0x0D LIST_BUFFER_WRITE 7 Bytes 21 Register 0x0E LIST_BUF_MEM_TRNSFER 1 Byte 22 Register 0x0F LIST_SOFT_TRIGGER 1 Byte 22 Register 0x10 RF_FREQUENCY 7 Bytes 22 Register 0x11 RF_LEVEL 3 Bytes 22 Register 0x12 RF_ENABLE 1 Byte 23 Register 0x13 RF_PHASE 7 Bytes 23 Register 0x14 AUTO_LEVEL_DISABLE 1 Byte 23 Register 0x15 RF...

Page 4: ...ytes 8 Bytes 31 Register 0x25 FETCH_DAC_VALUE 1 Byte 8 Bytes 31 Register 0x26 SERIAL_OUT_BUFFER 31 5 Communication Interfaces 33 Communication Data Format 33 USB Interface 33 Control Transfer 33 Bulk Transfer 33 SPI Interface 34 Writing the SPI Bus 35 Reading the SPI Bus 35 RS232 Interface 36 Writing to the Device Via RS232 36 Reading from the Device Via RS232 37 PXI 37 Setting Up the PCI to Seria...

Page 5: ...N THE PART OF SIGNALCORE INCORPORATED SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER SIGNALCORE INCORPORATED WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of SignalCore Incorporated will apply regardless of the form of action wheth...

Page 6: ...enyl ethers PBDE A indicates that the hazardous substance contained in all of the homogeneous materials for this product is below the limit requirement in SJ T11363 2006 An X indicates that the particular hazardous substance contained in at least one of the homogeneous materials used for this product is above the limit requirement in SJ T11363 2006 CE European Union EMC Safety Compliance Declarati...

Page 7: ...OT EVALUATED OR CONTEMPLATED BY SIGNALCORE THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF SIGNALCORE PRODUCTS WHENEVER SIGNALCORE PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION 2 Physical Description Unpacking All SignalCore pr...

Page 8: ...control I O is via the back PXIe interface connectors The SC5508A is a serial controlled core module whose RF and I O connectors are located at the front face as shown in Figure 1 Front face interfaces and indicators are explained below Signal Connections All signal connections ports on the device are female SMA type Exercise caution when fastening cables to the signal connections Over tightening ...

Page 9: ...nal reference clock The connector is SMA female This port is AC coupled with a nominal input impedance of 50 Ω Device LED Indicators There are both status and active LED indicator lights for the device and their functions are listed in Table 1 and Table 2 The active LED indicator lights are user programmable see register map Table 1 Status LED Indicator LED Color Description Green The device is fu...

Page 10: ...ectly before connection Table 3 Interface connector pin out description PIN SPI Function RS 232 Function 24 MISO TxD 28 27 MOSI RxD 26 CS_B 25 SERIAL READY 30 CLK 16 SPI MODE BAUD SELECT 14 Device Reset_B 18 Pulse switch control 22 Used Input 21 Trigger in 20 Trigger out 19 RF1 PLL Status 17 Do not connect 2 4 6 8 Supply 12V typ max 16V 1 3 5 11 15 23 29 GND 7 9 10 12 13 Not internally connected M...

Page 11: ...ment grade high performance synthesizer with easy to program register level control It functions as a standard synthesized CW source with the added capability of a sweep list mode that makes it ideal for applications ranging from automated test systems to telecommunication equipment to scientific research labs Being small and modular it is the ideal solution for system integration applications tha...

Page 12: ... in open loop Fine amplitude adjusts can be made by changing the ALC DAC value Additionally the ALC can be disabled and output level can be adjusted manually using the RF attenuators Disabling the ALC further improves the AM noise because the internal voltage variable attenuator is turned off removing control voltage noise to amplitude noise conversion Computational Time The ALC control is accompl...

Page 13: ...ency points that are either entered directly by the user or pre computed by the device based on user parameters Configuration of the device for list mode operation is accomplished by setting up the LIST_MODE_CONFIG register Sweep Function When frequency points are generated based on the start stop step set of frequencies this is in the context of this product known as putting the device into sweep...

Page 14: ...de via the RF_MODE register Upon completion of a cycle the frequency may be set to end on the last frequency point or return back to the starting point This cycle ending behavior is configured with bit 5 of the LIST_MODE_CONFIG register Trigger Sources The device may be set up for software or hardware triggering This is defined in bit 4 of the LIST_MODE_CONFIG register If software trigger is selec...

Page 15: ...nly registers to configure the device The registers vary in length to reduce redundant data and improve the communication speed especially for SPI and RS232 interfaces Furthermore it is vitally important that the length of data written to a register is exact because failure to do so will cause the interfaces to misinterpret the incoming data leaving the device in a stalled state The total number o...

Page 16: ...en Open Open Open Open Mode LIST_SOFT_TRIGGER 0x0F 7 0 Open Open Open Open Open Open Open Open RF_FREQUENCY 0x10 55 0 Frequency Word mHz 55 0 RF_LEVEL 0x11 7 0 RF Power Word 7 0 in 100th dB 15 0 Sign Bit RF Power Word 14 8 in 100th dB 23 16 Set to Zeros RF_OUT_ENABLE 0x12 7 0 Open Open Open Open Open Open Open Mode RF_PHASE 0x13 23 0 RF_PHASE Word 23 0 in 100th of deg 31 24 Zero RF_PHASE Word 30 2...

Page 17: ... WO Unused 7 Set all bits to zero Register 0x02 SET_SYS_ACTIVE 1 Byte This register turns on or off the active LED indicator on the front connector interface of the device This register should be called when the device is opened or closed in software Bit Type Name Width Description 0 WO Mode 1 0 turns off the active LED 1 turns on the active LED 7 1 WO Unused 7 Set all bits to zero Register 0x03 S...

Page 18: ...ies 50 MHz 4 WO Unused 1 0 set the phase of signal to 0 of Cos x 1 phase continues from last non DC CW signal only for previous frequency 50 MHz from low frequency generator 7 5 WO Unused 3 Set all bits to zero Register 0x04 RF_MODE 1 Byte This register controls the single fixed tone mode and sweep list mode Bit Type Name Width Description 0 WO RF Mode 1 0 Single fixed tone mode This mode must be ...

Page 19: ... the list buffer 1 Reverse In the reverse direction the sweep starts with the stop frequency and steps down toward the start frequency or starts at the end and steps toward the beginning of the buffer 2 WO Triangular Waveform 1 0 Sawtooth waveform Frequency returns to the beginning frequency upon reaching the end of a sweep cycle 1 Triangular waveform Frequency reverses direction at the end of the...

Page 20: ...e trigger must be sent or a change in the RF mode to single fixed tone needs to be made 5 WO Return to Start 1 0 Stop at end of sweep list The frequency will stop at the last point of the sweep list 1 Return to start The frequency will return and stop at the beginning point of the sweep or list after a cycle 6 WO Trigger Output 1 0 No trigger output 1 Puts a trigger pulse on the TRIGOUT pin 7 WO T...

Page 21: ... stop frequencies Register 0x09 LIST_DWELL_TIME 7 Bytes This register sets the dwell time at each step frequency Bit Type Name Width Description 31 0 WO List Dwell Time 32 Set the dwell time at each step frequency The Dwell time is incremented in 500 s increments For example to produce a 10 ms dwell time the value written to this register is 20d 55 32 WO Unused 24 Set to zeros Register 0x0A LIST_C...

Page 22: ... sequential pairs of frequency followed by amplitude Bit Type Name Width Description 54 0 WO Buffer word Frequency or amplitude 55 Writing this register stores the frequency mHz or amplitude 100th of dBm point into the list buffer held in RAM Writing 0x0000000000 to this buffer resets the pointer to buffer location 0 and flags the device to store data written to this register Consecutive non zero ...

Page 23: ...to zero Register 0x0F LIST_SOFT_TRIGGER 1 Byte This register provides a soft trigger to the device Bit Type Name Width Description 7 0 WO Soft Trigger 8 Set all bits to zero Calling this register provides a soft trigger to the device Register 0x10 RF_FREQUENCY 7 Bytes This register sets the RF1 frequency Bit Type Name Width Description 55 0 WO RF1 Frequency Word 56 Sets the RF frequency in mHz Reg...

Page 24: ... 1 Set to 0 55 32 Unused 24 Set to zeros Register 0x14 AUTO_LEVEL_DISABLE 1 Byte This register enables and disables the RF amplifier Bit Type Name Width Description 0 WO RF1 Auto leveling 1 0 Power is leveled on frequency change 1 Power is not leveled on frequency change with explicitly calling register 0x11 RF_LEVEL 7 1 W Unused 7 Set all bits to zero Register 0x15 RF_ALC_MODE 1 Byte This registe...

Page 25: ...ice to lock to external source No attempt will be made unless a reference source is detected 1 WO Reference out select 1 0 Outputs a 10 MHz signal 1 Outputs a 100 MHz signal 7 2 WO Unused 6 Set all bits to zero Register 0x18 REFERENCE_DAC_VALUE 3 Bytes This register allows the user to set or adjust the internal 10 MHz TCXO frequency Bit Type Name Width Description 13 0 WO DAC Value 14 14 bit word ...

Page 26: ... as the default values Register 0x1C SELF_SYNTH_CAL 1 Byte This register turns on self calibration of 2 internal synthesizers Bit Type Name Width Description 0 WO Select Synth 1 0 auto calibrates the coarse frequency VCO 1 auto calibrates the fine VCO 7 1 WO Unused 7 Set to Zeros Register 0x1D SENSOR_SETTING 3 Byte This register sets up the power sensor Bit Type Name Width Description 0 WO Sensor ...

Page 27: ...uency etc this depends on the request instruction byte Returned data length is always 8 bytes 64 bits with the first byte being the most significant MSB Not all 8 bytes are valid some have 7 some 4 and others 2 It is important that all 8 bytes are read in order to clear the interface buffers Table 7 Query Registers Register Name Register Address Serial Range Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit...

Page 28: ...bytes return 0x07 Current RF Phase 4 valid bytes return 0x08 Current RF Level 4 valid bytes return 0x09 Current Sensor Freq 7 Valid bytes 0x0A Sensor ADC value 2 valid bytes is 4 bytes of a float format number for example float phase float read_in_unsigned_int 7 4 WO Unused 4 Set all bits to zero 63 0 RO Data 64 Data with varying sizes of unsigned type Register 0x21 GET_TEMPERATURE 1 Byte 8 Bytes ...

Page 29: ...ulse at trigger out pin 29 RO List Config Return to Start 1 0 list ends at the end of a list 1 if list ends and cycles completed pointer returns to start 28 RO List Config Step Trig 1 0 HW trigger starts and stops the list 1 HW trigger steps the list points 27 RO List Config HW Trig 1 0 SW trigger 1 HW trigger 26 RO List Config Waveform Tri Saw 1 0 list steps start to stop then traces the steps ba...

Page 30: ...is not applied upon frequency change 1 adjustment is made 17 RO Operate ALC open 1 0 ALC loop is closed 1 ALC loop is operating in open mode 16 RO Operate RF enable 1 1 enable RF output signal 15 RO Operate PXI 10 MHz clock enable 1 0 disable 1 enable PXI clock at MCX port 14 RO Operate Ref clock out select 1 0 10 MHz 1 100 MHz 13 RO Operate lock external 1 0 disabled 1 enable 12 RO Operate cont d...

Page 31: ...Status 3 Writing this register will place the requested contents into the output buffer Contents are immediately available for USB read The contents occupy effectively four bytes In the case of SPI contents are transferred to the serial output buffer so a second query to the SERIAL_OUT_BUFFER register is required to transfer its contents and also to clear the output buffer 0 Obtain the product ser...

Page 32: ...ter 0x25 FETCH_DAC_VALUE 1 Byte 8 Bytes Write to this register to query 8 bytes of data from the user EEPROM at the starting address Bit Type Name Width Description 0 WO Dac select 1 0 is high frequency synth ALC DAC value 1 is low frequency synth amplitude DAC value 7 1 WO Used 15 zeros 15 0 RO Dac Value 16 Data 63 16 RO Invalid Data 48 zeros Register 0x26 SERIAL_OUT_BUFFER Writing to this regist...

Page 33: ...Rev 1 0 SC5507A SC5508A Hardware Manual SignalCore Inc 32 SC5507A SC5508A Hardware Manual Section 2 Communication Interfaces ...

Page 34: ...t in 1000th of Hertz so the data that represents the frequency is 3 000 000 000 000 milli Hertz 2 This number can be represented by a 64 bit unsigned long and in Hexadecimal is 0x 0000 0574 FBDE 6000 The least 7 bytes are necessary to represent all frequencies allowable for this device so the MSB is used to hold the register address 3 A buffer needs to be 8 bytes for register RF_FREQUENCY address ...

Page 35: ...𝐶𝑆 must be asserted low for the entire duration of a register transfer Once a full transfer has been received the device will proceed to process the command and de assert low the SRDY pin The status of this pin may be monitored by the host because when it is de asserted low the device will ignore any incoming data The device SPI is ready when the previous command is fully processed and the SRDY pi...

Page 36: ...ze in bytes depends on the register being targeted The first byte sent is the register address and subsequent bytes contain the data associated with the register As data from the host is being transferred to the device via the MOSI line data present on its SPI output buffer is simultaneously transferred back MSB first via the MISO line The data returned is invalid for configuration registers The f...

Page 37: ... is set to 115200 at power up or upon HW reset When the pin is pulled low or grounded the rate is set to 57600 upon reset or power up Data bits The number of bits in the data is fixed at 8 Parity Parity is 0 zero Stop bits 1 stop bit Flow control 0 zero or none Only 3 wire RS232 is required since hardware flow control is not used These connections are the Tx Rx and Gnd This interface is common on ...

Page 38: ...ry registers are sent even if they are null All queries will return 8 bytes of data read with the first received byte being the most significant MSB Section 4 2 Query Registers provides the format details of the received data PXI The PXIe interface contains a high speed PCIe to Serial bridge chip This bridge chip communicates with the onboard microcontroller serially The interface on the bridge ch...

Page 39: ... for each device register The first byte sent is the device register address followed by the most significant byte of the register s associated data When a device register is fully written that is all its data has been sent to the device it will return 1 byte This returned byte must be read by the host to clear the transfer buffer so that later received data are not corrupted Section 5 5 3 1 descr...

Page 40: ... 2019 Rev 1 0 39 Revision Table Revision Table Revision Revision Date Description 0 1 2 26 2019 Document Created 1 0 5 16 2019 Initial Release ...

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