SightLine EAN-4000-OEM Manual Download Page 3

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EAN-4000-OEM-MIPI-Cameras

Power and network connectivity LEDs:

A green light (D1) on the 4000-OEM board indicates that all boards are powered on. An amber light
(D5) verifies network connection.

Figure 1: 4000-OEM MIPI Camera Bench Setup

Configuration Settings

This section covers the basic camera configuration settings in Panel Plus for the SightLine 4000-OEM
video processing board.

Before connecting with the Panel Plus software, the OEM board should be powered up and connected
through:

a network switch or directly to the host PC (preferred) or,

Direct serial connection (for troubleshooting or if a network connection cannot be established).



See the

EAN-Startup Guide 4000-OEM

for connection and video streaming instructions.



IMPORTANT:

This procedure assumes that the customer has read the OEM startup guide(s) and

has a basic understanding of the following fundamentals:

•

Completed a functional connection between the SightLine video processing board and Panel
Plus application

•

Familiar with Panel Plus controls

•

Successfully streamed video in Panel Plus



If you do not have a strong basic system setup and familiarity, we recommend reviewing the OEM
startup guide and work with our support team to establish basic connection and streaming
fundamentals.

Network Switch or PC Direct

SLA-CAB-1504 (J50)

Serial (SLA-CAB-504)

SLA-CAB-0403 (J4)

4000-OEM

RJ45 Ethernet

SLA-PWR-B12V-36W

Optional Serial SLA-CAB-0305

USB to PC

SLA-CAB-0804

SLA-CAB-MIPI-02 (J9)

MIPI

Camera



The camera is immediately
powered on when power is
connected to the OEM board.

(J6)

Optional Camera
Adapter Boards

MIPI Camera

Cable

4000-P122 Board

Summary of Contents for EAN-4000-OEM

Page 1: ...4056 x 3040 Image 8 5 5 I2C Communication 9 6 Troubleshooting 10 6 1 Determining Settle cnt 10 7 Questions and Additional Support 10 Appendix A MIPI Camera Requirements for Connecting Commercial Cameras 10 A1 Vendor Provided Driver Interface 10 A2 Raw Capture Only 11 A3 Connector Requirements 12 Appendix B MIPI Camera Capture Requirements Custom MIPI Inputs 12 B1 MIPI Packet Format 13 B2 MIPI Pack...

Page 2: ...ware Download page 2 Optional Interface Boards and Adapters Additional system interface boards provide options for network interfacing serial ports and GPIO Camera interface and adapter boards provide an interface from the camera to OEM See the ICD 3000 4000 Adapter Boards for complete specifications and pinouts IMPORTANT All boards should be connected and secured with the included cables and hard...

Page 3: ...ction and video streaming instructions IMPORTANT This procedure assumes that the customer has read the OEM startup guide s and has a basic understanding of the following fundamentals Completed a functional connection between the SightLine video processing board and Panel Plus application Familiar with Panel Plus controls Successfully streamed video in Panel Plus If you do not have a strong basic s...

Page 4: ...guration notes Requires software version 3 01 xx and above Enter flag mipi ov9281 in the Options field VC MIPI IMX296 Mono Vision Components IMX296 Mono 1080 1440 0 0 10 Gray None None None None 0x0 Configuration notes Requires software version 3 01 xx and above Enter flag mipi imx296 in the Options field VC MIPI IMX412 Color Vision Components IMX412 Color 2160 3840 0 0 10 Bayer None None None Non...

Page 5: ...DD Exposure integration time Luma analog gain Red Green Blue digital color gains can be adjusted using the Set ADC Parameter 0x18 command Exposure Sets the integration time of the sensor A higher setting is better for noise lower is better for fast motion For IMX412 0 maps to 8 lines of exposure 255 maps to 2048 lines of exposure If this setting is too high it may result in motion blur with a movi...

Page 6: ...2 Automatic Exposure and Gain New in 3 2 x software The 4000 OEM supports automatic exposure and gain control for the Vision Component IMX412 camera by automatically controlling the exposure and gains The system calculates the mean value over a specified ROI and then adjusts exposure and gains to move the mean towards the target value This is specified in the Brightness control in the Image Contro...

Page 7: ...ult Minimum Maximum Exposure Limits the exposure range Auto gain algorithm notes For best image quality the system attempts to do the following in order maximize exposure analog gain digital gain To make a scene brighter first increase the exposure If the exposure is at maximum increase the analog gain luma If the analog gain is set at maximum increase the digital red green and blue gains Auto gai...

Page 8: ...Crop 2x Vertical Horizontal Binning Images can also be cropped from the active image area using the Hardware Crop function In Acquisitions Settings dialog set the Horizontal Front Porch and Vertical Front Porch values and then select Hardware Crop in the Sync Crop dropdown menu Horizontal Front Porch HFP and Vertical Front Porch VFP are applied to the full image as a starting point to the start of...

Page 9: ...920 2 216 The maximum VFP in the above image is 3040 1080 2 880 Figure 7 Downsampled 1920 x 1080 Image 5 4 Hardware Crop 4056 x 3040 Image The example in Figure 9 shows a 1080p image cropped from the center of the 4056x3040 image using the following Panel Plus Acquisition Settings shown in Figure 8 Horizontal Front Porch 4056 1920 2 1068 Vertical Front Porch 3040 1080 2 980 Syn Crop Hardware Crop ...

Page 10: ... window to set a register in the sensor Panel Plus main menu File Send Command For example to set a register 0x0204 to a value of 0x01 send this command as shown in Figure 10 The address of the IMX412 is 0x1a Contact Sony to get a list of register descriptions and settings Figure 10 I2C Sensor Communication Gain It is possible to use Linux commands to read a register on the sensor from the command...

Page 11: ... operations does not exist For new MIPI cameras working through configuration issues takes time Reusing driver code from other cameras in most cases does not work It is essential to address the Linux driver availability for new MIPI camera early in the process A1 Vendor Provided Driver Interface The vendor provided driver interface does not use Snapdragon 820 ISP A Linux driver must be provided Li...

Page 12: ...for the Snapdragon YUYV UYVY YVYU VYUY packed YUV 4 2 2 V4L2_PIX_FMT_YUYV V4L2_PIX_FMT_UYVY supported V4L2_PIX_FMT_YVYU V4L2_PIX_FMT_VYUY MIPI RAW8 8 bit Bayer raw V4L2_PIX_FMT_SRGGB8 V4L2_PIX_FMT_SGRBG8 V4L2_PIX_FMT_SGBRG8 V4L2_PIX_FMT_SBGGR8 MIPI RAW10 10 bit packed Bayer raw V4L2_PIX_FMT_SBGGR10P V4L2_PIX_FMT_SGBRG10P V4L2_PIX_FMT_SGRBG10P V4L2_PIX_FMT_SRGGB10P supported MIPI RAW12 12 bit packe...

Page 13: ...he ICD The MIPI camera interface consists of a clock signal and 1 2 or 4 data lanes The number of data lanes depends on the camera frame rate and resolution The MIPI standard also provides for an I2C bus for camera configuration that may not be used in customer FPGA implementations IMPORTANT When designing a custom MIPI FPGA camera board it is important to include a way to externally reset the FPG...

Page 14: ...16 bit YCbCr HD YUV422_8 0x1E 2 8 x2 YUV bits 16 BT 1120 8 bit YCbCr SD YUV422_8 0x1E 2 8 x2 YUV bits 8 BT 656 NTSC PAL 8 bit Bayer YUV422_8 0x1E 2 8 x1 Bayer bits 8 AGS720P Color Data conversion for current non MIPI cameras YUV422_8 packet The packet width is optionally doubled to support 2x8 bit 16 bit data 16 bit data order is low byte then high byte little endian We recommend providing for byt...

Page 15: ...ix App note on Mipi timing The timing parameters should be specified by the documentation in the MIPI IP package used to generate the MIPI packets This will be dependent on the camera pixel clock Figure 11 shows how a scope trace can be used to measure and compare values as the FPGA code is being developed The trace in this example was taken off the N phase of Tx Lane 0 the P phase looks different...

Page 16: ...ial port requires the use of the 4000 DEBUG board See the ICD 4000 OEM for details The debug serial port output defaults to 115 200 baud The CSI Frequency is shown in the debug output line Setting csi frequency 100000000 pixel_clock 74000000 The pixel_clock value will be the clock value set in mipi_clk The TSettle Count and number of Tx Lanes are shown in the debug output line pixel_clock 74000000...

Page 17: ... This means that the upper 7 bits are 0x40 and the lower bit is 0 or 1 depending on the Read Write attribute Since the slave address is 0x40 the 8 bit write address is 0x80 and the 8 bit read address is 0x81 CSI2 supports I2C Bus 1 Cam 0 CSI0 supports I2C Bus 3 Cam 1 On the SOM Port J9 All register values are 16 bit little endian low byte first Table B4 I2C Register Map I2C Address Description Exa...

Page 18: ...on 0 i2cget f y 1 0x40 1 i2cget f y 1 0x40 0 echo Version 1 i2cget f y 1 0x40 3 i2cget f y 1 0x40 2 echo VFP i2cget f y 1 0x40 0x9 i2cget f y 1 0x40 0x8 echo height i2cget f y 1 0x40 0xB i2cget f y 1 0x40 0xA echo HFP i2cget f y 1 0x40 0xD i2cget f y 1 0x40 0xC echo width i2cget f y 1 0x40 0xF i2cget f y 1 0x40 0xE ...

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