TXP-CLC
Course
Signal Simulation
Irrespective of the input signal present a binary signal can be simulated via the
software using the software simulation feature. The effect on the process image
is the replacement of the process value with the simulation value. The effect on
time-tagged data is the TTD ”Channel simulated” or ”Channel not simulated”
being generated, in as far as the TTD has been configured for the binary signal.
The effect on internal further processing is that the simulation value is processed
further as if it were the process value. There is no indication on the module that
signal is being simulated. Fault indications for the point will be inactive during
simulation.
To simulate a signal, on an open function plan with a binary input signal block,
select the “BE/SIG” signal definition (SIGDEF) connection with the left mouse
button.
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Next use the middle mouse button to select the simulation option, and select the
binary value on the pop up window. Click “ok” to enter the value.
Training Center
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Summary of Contents for TXP-CLC
Page 5: ...TXP CLC Course 1 TXP Overview Training Center ...
Page 11: ...TXP CLC Course 2 Automation System AS620 Training Center ...
Page 19: ...TXP CLC Course 3 Industrial Ethernet Training Center ...
Page 29: ...TXP CLC Course 4 Engineering system ES680 Training Center ...
Page 45: ...TXP CLC Course 5 KKS Overview Training Center ...
Page 81: ...TXP CLC Course 6 Training Project Exercise 1 2 Training Center ...
Page 101: ...TXP CLC Course 7 BT Function Block Exercise 3 Training Center ...
Page 121: ...TXP CLC Course 8 AT Function Block Exercise 4 Training Center ...
Page 137: ...TXP CLC Course 9 CBO Function Block Exercise 5 Training Center ...
Page 145: ...TXP CLC Course 10 CAO Function Block Exercise 6 Training Center ...
Page 155: ...TXP CLC Course 11 DCM Function Block Exercise 7 Training Center ...
Page 187: ...TXP CLC Course 12 Generation Transfer Exercise 8 Training Center ...