Technical Description
S5-115U Manual
CPU 943
Figure 2-5. Schematic Representation of CPU 943
The CPU 943 contains an application-
specific integrated circuit (ASIC) and a
microprocessor. The microprocessor
handles all programmer interface mo-
dule functions, processes interrupts
and substitution operations and con-
trols the S5 bus. The microprocessor al-
so controls the ASIC that handles high-
speed processing of STEP 5 operations.
Besides the operating system memory,
the CPU 943 also has an internal RAM
(48 Kbytes) that can be used to store
the control program.
The contents of memory submodules
are copied to the internal RAM after
POWER UP and after overall reset.
The CPU 943 can also be ordered with
two interfaces. The second interface is
controlled by a further microprocessor
with its own operating system. This
operating sytem is also stored in the
operating system memory for the CPU.
Programmers, operator panels (OPs)
and SINEC L1 can be connected to the
second interface; point-to-point con-
nection via the SINEC L1 protocol is al-
so possible. The CPU 943 operating sy-
stem also supports the following addi-
tional functions:
•
ASCII driver for data interchange
over the second interface and for
connecting peripheral devices (e.g.
printers)
•
Integral real-time clock.
Micropro-
cessor for
2nd serial
interface
OP
Internal
RAM
48 Kbytes
Microprocessor
- processes some
word operations
- controls bus
- handles 1st serial
interface
Control
panel
Memory
submodule
Operating
system memory
64 Kbytes for
- CPU
- 2nd serial in-
terface
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Pro-
grammer
Clock
Operating
system
memory
32 Kbytes
ASIC
- processes bit
and some word
operations
- processes times
- monitors scan
time
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I/O
modules
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Controller
for
S5 bus
2-10
EWA 4NEB 811 6130-02b
Summary of Contents for SIMATIC S5-115U
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