S5-115U Manual
Addressing/Address Assignments
6.3.2
Accessing the PIQ
New signal states are entered in the PIQ during program scanning. This information is transferred
to the output modules at the end of each program scan.
PIQ
0
15
Writing bit by bit
in binary operations:
=Q 4.6
7 6 5 4 3 2 1 0
Bit No.
Byte 4
Writing byte by byte
to transfer from ACCUM 1:
T QB 36
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
a a a a a a a a a a a a a a a a a a a a
Byte 36
Writing word by word
to transfer from ACCUM 1:
T QW 52
a a a a
a a a a
a a a a
High-Order
Byte
(Value 00
H
)
ACCUM 1
Low-Order
Byte
0
15
Byte 52
Byte 53
High-Order
Byte
ACCUM 1
Low-Order
Byte
Figure 6-9. Accessing the PIQ
On all CPUs, output of the PIQ to the output modules can be inhibited by setting bit 2 in system
data word SD 120 (EA70
H
).
Bit 2="1":
Output of the PIQ is inhibited.
Bit 2="0":
Output of the PIQ is enabled.
The default setting is bit 2="0" (output of the PIQ enabled).
Note
System data word SD 120 can be modified over the programmer function DISPL. ADDR.
only when the PLC is in the STOP mode!
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6-9
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