Fundamental Structure
C500 Family
Semiconductor Group
1-3
1998-04-01
Figure 1-1
Program Memory Configuration (Example of the C501)
1.2.2 Data Memory
The data memory area of the C500 family microcontrollers consists of internal and external data
memory portions. The internal data memory area is addressed using 8-bit addresses. The external
data memory and the internal XRAM data memory are addressed by 8-bit or16-bit addresses.
The content of the internal data memory (also XRAM) is not affected by a reset operation. After
power-up the content is undefined, while it remains unchanged during and after a reset as long as
the power supply is not turned off. The XRAM content is also maintained when the C500
microcontrollers are in power saving modes.
1.2.2.1
Internal Data Memory
The internal data memory address space is divided into three basic, physically separate and distinct
blocks: the lower 128 byte of internal data RAM, the upper 128 byte of internal data RAM, and the
128 byte special function register (SFR) area. The lower internal data RAM and the SFR area
further include 128 bit locations each. These bits can be handled by specific bit manipulation
instructions.
1FFF H
0000 H
Memory
Program
FFFF H
External
Internal
Program
Memory
H
2000
ROM
Boundary
EA = 1
EA = 0
External
H
FFFF
Program
Memory
H
0000
MCD02766
The location of the ROM boundary depends on the specific C500 devices.
