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Shugart SA4600, Manual

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Summary of Contents for SA4600

Page 1: ...SA4600 Fixed DiskController I 2 2 2 I I ...

Page 2: ...SA4600 Fixed DiskController I Copyright 1979 Shugart Associates I I ...

Page 3: ...Completion 5 4 1 2 Sub System Error 5 4 1 3 Operator Intervention 5 4 1 4 Command Erroi Command Description 6 1 Control Commands 6 1 1 Initialize 6 1 1 1 Sector Interleave Code 6 1 2 Recalibrate 6 1 3 Seek 6 1 4 Terminating Sector Request 6 2 ReadlWrite Commands 6 2 1 Format Cylinder 6 2 2 WriteID 6 2 3 Write Data 6 2 4 6 2 5 6 2 6 6 2 7 6 2 8 6 2 9 6 2 10 6 2 11 6 2 12 6 2 13 VVrite Data Special ...

Page 4: ...Option Description 9 1 Control PCB 9 1 1 Drive Select 9 1 2 Byte Clock Sector Mark 9 1 3 Miscellaneous 9 1 4 Sector Counter Options 9 1 5 Cable Termination Description 9 2 Data Separator PCB Format Description Error Retry Physical Description 12 1 PC Board 12 2 Connectors 12 2 1 50 Pin Connectors 12 2 2 20 Pin Connectors 12 2 3 Power Connector Appendix A General Microcode Flowchart Appendix B Sche...

Page 5: ...Connection RQ Jumper Option Timing Read Mode A Jumper Option Timing Write Mode SA4600 Format P C B Physical Layout Drawing 50 Pin Connector Drawing 20 Pin Connector Drawing DC Connector Drawing Listof Tables 1 2 3 4 5 6 7 8 Interface Register Map Command Code Chart Parameter Description Status Register Map Resu It Register Map Initialize Parameter Map Interleave Code Sector Counter Options 3 4 5 6...

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Page 7: ...drives E Single five volt supply 2 0 SPECIFICATION SUMMARY Environmental Limits Ambient temperature O C to SO C 20 to 80 Relative humidity OC Voltage Requirements S VDC S 7 0A typical 7 S maximum with floppy option Heat Disipation 120 BTU hr typical Mechanical Dimensions reference Figure 8 Length 18 4S 72cm Width l2 S 31 7Scm Height 1 2 S4cm 3 0 SA4000 DRIVE INTERFACE DESCRIPTION Reference Figure ...

Page 8: ...ue 48MA This cable should not exceed 10 feet 3 meters A description of the CPU interface lines follows 4 1 Reset This line will cause the controller to cease all operation clear local ram memory reset the command status and result registers and go into a normal wait loop A reset during a write operation may cause improper data to be written The RESET pulse width must be at least 200 nanoseconds Th...

Page 9: ...18 19 20 Ground Ground Ground Ground WRT Data WRT Clock Ground PLO Clock Read Data Ground When this line is active along with controller select one of two read only registers will be read onto the data bus See Table 1 and host interface timing Figure 4 4 5 Write When this line is active along with controller select one of two write only registers will be written to from the data bus See Table 1 an...

Page 10: ...t a memory cyde Refer to Figure 5 DMA timing See Section 8 0 for optional configuration 4 8 DMA Acknowledge This signal is made active by the host CPU to indicate that a memory cycle has been granted and that data is either present on the data bus or data has been written into memory from the data bus The data bus is active during acknowledge for either a read or write operation Refer to Figure 5 ...

Page 11: ...ure 4 5 1 Command Register This is a 8 bit write only register that when loaded signifies the beginning of a command sequence This register may not be reloaded until a result has been presented to the host CPU Table 2 lists the commands executed by the controller and their binary bit patterns Section 6 0 describes each command in detail 5 2 Parameter Register All commands issued to the controller ...

Page 12: ...signment is as follows 5 3 1 Command Busy and Command Reg Full When the Host CPU sets a command into the command register both the command full and command busy bits will be set When the controller reads the command and begins execu tion it will reset the command register full bit During execution the command busy bit remains set The controller will then set interrupt at the completion of the comm...

Page 13: ...0 3 4 Inhibits Retry When set I Multiple Sector Gp When Set l Inhibits Imbedded Seek When Set 5 3 3 Result Reg Full This bit is set at the completion of a command sequence to indicate that the Host CPU must read the result register This bit is reset when the result register is read by the Host CPU The result register is only valid when this bit is set 5 3 4 Interrupt The controller will set this b...

Page 14: ...Head Address Bit 4 is the second side for 2 sided floppy s Fixed Head The head address is interpreted as the fixed head address 3 2 0 I Cylinder Address 3 2 0 I Starting Sector Address 3 2 0 c I r Multiple Sector Count Table 4 Status Register Map 2 3 4 5 6 MSB 7 LLLNotUsed Not Used Not Used L _ _ Interrupt Result Reg Full Parameter Reg Full Command Reg Full Command Busy ...

Page 15: ...or head address read off the disk in the ID field of a sector The control unit will re calibrate and re seek the head arm if retry is not inhibited before posting this result 00 1 CRC Error ID Field The control unit detected a CRC error in an ID field Comp Code Table 5 Result Register Map Result Reg MSB 7 Not Used 4 65 J r Completion Code Completion Type 3 2 f Speciai Data Found LSB o Defective ID...

Page 16: ...write fault at the beginning of a new command 5 4 1 4 Command Error Completion Type 11 This type of result is sent when the control unit cannot execute the command as specified 000 Illegal Length The parameters for the command exceed the maximum cylinder head or sector capacity of the drive as specified by the initialize command for that drive 00 1 Record Not Found The specified sector did not occ...

Page 17: ...mat of disk is not going to be done 6 1 1 1 Sector Interleave Code A sector interleave code must be specified during an initialize command allowing for mul tiple sector reads or writes to occur without having to wait one revolution of the disk for each sector transfer Sequential sector transfers are not possible due to timing limitations of the controller firmware The sector interleave code specif...

Page 18: ...s set upon completion of the seek with a seek complete result byte Note that command busy bit is not set with this interrupt 6 1 4 Terminating Sector Request This command is valid after a read write search Of verify uata command There are seven bytes DMA transferred to the CPU memory The first three bytes are the cylinder head and sector for the last sector the controller operated on If an error o...

Page 19: ...d is complete 6 2 3 Write Data This command will write the data field of the length specified in the initialize command Data transfer from memory will begin filling the sector buffer before the sector is under the read write head and DMA overrun will be checked during the write operation 6 2 4 Write Data Special This command operates the same as a write data except a unique address mark is written...

Page 20: ...n equal length sector on the same or different drive without transferring data through memory The sector address specified in this command will be a physical sector address The write buffer command writes the present contents of the sector buffer to the sPecified sector The sector buffer may be filled with a read data write data or verify data command 7 0 COMMAND PROCEDURE The controller operates ...

Page 21: ...a transfer techniques The data bus option is accomplished by cutting 8 traces that remove the bi directional tri state data bus signals from even pins 20 through 34 and adding 8 jumper plugs that connect the data bus outputs to even pins 36 through 50 Input data is now received on even pin 20 through 34 See Figure 6 Also see Appendix BjSchematics 8 1 Rand W Jumper Description The DMA request and D...

Page 22: ...e 7 and Figure 7 1 8 3 Jumper Description Jumper F must be installed for proper operation 9 0 SA4000 DRIVE OPTION DESCRIPTION To achieve proper operation from the SA4000 interfaced to the SA4600 certain jumper options on the SA4000 drive must be set They are as follows 9 1 Control PCB 9 1 1 Drive Select The Jumper X must be opened and one of the four drive select lines DS I 2 3 4 must be jumpered ...

Page 23: ... pack is located at location 3H Removal of 3H unterminates the drive In a single drive system 3H must be in place 9 2 Data Separator Board Jumper C sync up on O s must be jumpered Jumper D sync on l s must be open All other jumpers must be configured for the host system s individual requirements Refer to the SA4000 OEM manual part number 39005 10 0 FORMAT DESCRIPTION As mentioned in the introducti...

Page 24: ...a since when a write data operation is performed only the data field is changed not the ID field Two types of sync marks are used to flag the beginning of the data field A Hex DD is the normal sync byte data pattern A Hex DB is used to flag special data fields user defined Refer to Figure 8 for a layout of the SA4600 format OB SPECIAL DATA 7 USER DEFINED Figure 8 SA4600 Format ii v ERROR RETRY The...

Page 25: ...ith the even pins on the component side of the board The recommended mating connector is Scotchflex ribbon connector P N 3415 0001 or Amp twin leaf printed circuit connector P N 583717 1 utilizing Amp contacts P N 1 583616 1 12 2 2 20 Pin Connectors These edge connectors match those read write connectors on the SA4000 series drive The dimensions are shown in Figure 11 The recommended mating plug i...

Page 26: ... I I I I 100NOMJ I L 50 4 2 575 010 J 21 Figure 10 50 Pin Connector Drawing 2 TI 400 010 l BOARD THICKNESS J 062 007 lit 050 I 063 NOM NOM 050 100 NOM NOM 1 oiI1 1 075 010 I Figure 11 20 Pin Connector Drawing Figure 12 DC Connector Drawing 063 NOM ...

Page 27: ... BITS IN THE STATUS REGISTER READ COMMAND BYTE THEN RESET THE COMMAND REG FULL BIT IN THE STATUS REG NO SET PARAMETER REGISTER FULL BIT IN STATUS REG READ THE PARA METER AND RESET THE PARAMETER REG FULL BIT YES Basic Command Process Flowchart Sheet 1 22 ...

Page 28: ...EAD DIAG NOSTIC VERIFY DATA TERMI NATING SECTOR WRITE CYL ID FORMAT CYLIN DER WRITE DATAl SPECIAL START SEEK TIMER AND RESET CMD BUSY AND CMD REG FULL BITS 23 NO LOAD RESULT REG AND SET INTER UPT 1 HAS RESULT REGISTER BEEN READ YES RESETINTERUPT AND STATUS REG BITS COMMAN D DON E Basic Command Process Flowchart Sheet 2 ...

Page 29: ...Appendix B Schematics 24 ...

Page 30: ...S S I 1fo 9 R e 2 3 C DEC i o p 15 ____________________________ 1_ _ D u 1 4 _ _ _ _ J c 1 1 2 1 G t II t 3 1 R IC T e SOIC C ___________________4 0 f__ R I lT Bf o 1 SooE i I IO D 13 I r ib b 9 f I __ 3 c o l iO 15 o u 1Pf 14 _ CL I 12 1 ____________________ X 4bq 4 1 1 _ I 4 9 4 z t i Il 2 0 lr l1 n iC l 31 b LL OUV l S J 15 l o l 3 I I ___________2 4 wf I C I C ll C l S laIES I l l E S 01 4ERWI...

Page 31: ...15 o 3 5 111 19 13 Z zL f l I oL PO C II I t l _r I II 1 l1 114 I L 112M 2 0 10 II e 14D 2 0 10 cS 214 1 e Ie 2 0 10 OBJIIB I I e ID 2 D 50 0 2 0 10 I I li I 2L I L 14L I 14 2 5I 9A I I I e I t A t t ICA 8 I S I 1 Ie n 1R L18B 1 8 H rl RLl IOr4 18 7 C1 1 12 13A 5 4 J d c O B oatY L A D A U Y 2 I Y3 Ed 15LY4 e 1r z E 5 10 rl I q _ G 1 p l 4 II 10 C t 2 t 3 5 I a 3 MUST CONFORM TO ENGINEERING SPEc E...

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Page 35: ...1 2 E I ___ I O I 12 oj REb c L Tc I J 54 4 SRC E t e 1 Eo f 9 _ be41 _ i H 8 1 r o r t 4G 4 LI 11 7 46 3_______ I 5 13 4 4 114D _ 4 IO I 31 l gI14 JrO L _ _ _ _ _ _ _f ___ 2 Ll IL 9 0 c Q _ E l R c n ________________ f_____________ ______ J i 2 11_ D 1011 0y 7 U 4 4T i 3 4 __ 0 0 2 ISD 6 9 JlsE if 4 I3 Q q q D D rl t S l I L __ 5 11 2 31 4 T 4 J 5 p II rr I S J je 12 M 3 4 4 la 12 _ SE T L B it 2...

Page 36: ...L Q L 15 a A Bo ______ ___ __ 1 B CT G l bi l H I 4 j 14 Bi 2 L __ _______ _____ j 4 __ IO C 2 r 2 13 C II A Bo L O R QJ 12 2 1 A _ 1T2T4 7 t I C 11 L ___________ i0 A 6o A A 1413IL 2 __ II 1 DIJ 1 6RW J l c j H Q uP CR I S4 I t B 1 11 0 15 1 3 A Bo 50 L ___ __ I B eif G Dr I 1 L _ _ _ _ _ _ _ _ _ _ _ 1 4 Bi 11 4 10 1 C Q B 2 1 3 A r L ________ _ i 1 D R Q G S I B Po Bo Q I C K _ 4 B _____________...

Page 37: ...0 I 4 2 3 4 5 9 10 II f 1 2 4 9 10 1 I 2 o R N DO I 8 1 II I t t H R N ODI I 4 4 1 4 H 1 4D b 2 2 II J IS A 3 Ii A4 14 t o A DIM 15 l L A 1 4 DOUT p s 0 AI C5 A b 102 4 We R b N e IT l Ao DIN 15 AL A 2 B P 4 DOW 1 At r 1 4Dla 4 i 1 r 17 r Ds4 L 1 _ _ _ _ _ _ ___ _ _ c A 3 14 tg S4GZl 4 4 _________ B A4 4 12 T DBl f o A Cs Aa b 1 1024 WE R N i A c D N 15 3 4 DOU1 1 s A1 cs A8 t Oj 02 4 We k b M elT...

Page 38: ...5 1 R 2 1 I 15 5E OIJ 7 147 B I _ t C Y2 tr 13 ___ 1 D cJ y I r II D l Y4 L _ _ _ _ _ _ _ _ __ r i 4 q 6 2A 15 r 5 Z6 3 1 15 4E Yo b I B 2 12 c 3 DEc 4 p I 1____________________________________ ________________ ID D 5 IO r r r ____________4 qZA i i8 c 4 t 4 5 1 f4 21 c L r Z I J 0 NC 4 7 II I O f ge 9 1 4 J R PL O 5 4 LO PPY PLO 1 ljS zt _ 1 t lF U 2 B sLyd It f IP iR 4 13 I IJ IR T WR z D i A t 1...

Page 39: ... O ri _ r r 2 1 r 04rl i r 4r r 1 r 19 t t I 5 t 7 I 1 J CSI 1so r H_ _I _ _ _t_ I_ _ _I _r t H__ _Q CS i S 0 L ___ C_ _ _ __ N_ l _ l __ H 1H i 1 1 H P CS _ 2 __ _ _f _ I 0 I 1 I 4 I I r r _f_ r _f_ _I_ 1_ _ _ _ XI L S 4 s L t _r 1 t t t t t i 1 r r 2 8I IS I I 2 1 114 L _t_ _ _ _ _I 1 t r t t _r i r r L L 3 L _H_ Hi o t _t_ _r _ _ _t 571 I 2 4 III I t t_r i t t _t_ i H_t_ i 2 3 IIO 2 2 I l L _ _...

Page 40: ...1 79 39008 0 ShUgart Associates 435 Oakmead Parkway Sunnyvale California 94086 Telephone 408 733 0100 TWX 9103399355 SHUGART SUVL PRINTED IN U S A ...

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