Shiratech Solutions Spark-100, Integration Manual, Page: 12 / 41

12 | Spark-100 HW user manual v1.3
2.3 HPS Interfaces
The Spark-100 offers a variety of interfaces from the HPS (SOC ARM core) such as USB, Ethernet, I2C,
SPI, UART and more. The following paragraphs describe the various interfaces available along with
recommendations on how to connect them to the carrier board.
2.3.1 USB
The SPARK-100 uses a single Host/Device (USB1) of the HPS. The USB port on the HPS features the
following:

Supports USB 2.0 host and device operation

Dual-role device (device and host functions)

High-speed (480 Mbps)

Full-speed (12 Mbps)

Low-speed (1.5 Mbps)

Supports USB 1.1 (full-speed & low-speed)

Integrated descriptor-based scatter-gather DMA (SGDMA)

Up to 16 bidirectional endpoints, including control endpoint

Up to 16 host channels

Supports generic root hub

Automatic ping capability

Configurable to OTG 1.3 and OTG 2.0
The card has two possible configurations for the USB usage based on internal USB switch (see figure 6):

A single OTG port.

Two host ports using an internal HUB.
The selection is done using IO pin 0-0 of the I2C I/O expender.
HPS
USB PHY
OTG
(USB3300)
Data[0..7]
Ctrl
USB Switch
(USB3740)
USB
USB HUB
(USB2422)
OTG
Host
Host
USB_HUB_OTG_SEL (U19)
Module Carrier
Figure 6 - HPS USB Interfaces
A USB PHY device (USB3300 Microchip) is used to convert the HPS ULPI interface into a USB OTG
interface. The USB OTG output is then connected to an analog USB switch (USB 3740). The switch
connects the USB OTG interface directly to the SAMRC interface or to an internal USB HUB.
The internal USB HUB (USB2422) is a two ports HUB providing two USB Host interfaces over the SMARC
connector.