Sharp FO-5700, Service Manual, Page: 45 / 140

FO-5700U
5 – 1
2. Description of each block
(1) Main control block
The main control block uses RISC microprocessor HD6437021 as CPU,
being composed of ROM (2 MByte), DRAM (2 MByte) and SRAM (256
KByte).
1) SH7021 (IC27): pin-100, QFP (main CPU)
The device is a microprocessor which integrates the peripheral func-
tions, using CPU of 32-bit RISC type as the core. In the instrument, the
following peripheral functions are mainly used.
1
ROM of 32 KByte and RAM of 1 KByte are integrated.
A part of programs are stored in the integrated ROM.
2
DMA controller (4 channels are provided, and 2 channels alone are
used.)
ch.0: Used to transmit image data between CODEC (HD813201F)
and DRAM (IC16).
ch.2: Used to transmit image data between Flash memory (option)
and DRAM(IC16).
3
Clock-synchronous type serial communication interface commands
and statuses are communicated with PCU.
4
Interruption
IRQ4, IRQ7: Interruption request from gate array (A) (LZ9FJ59)
IRQ6: Interruption request from gate array (B) (LR38292)
IRQ0, IRQ1, IRQ2, IRQ3, IRQ5, IRQ7 : Not used.
NMI : Not used.
5
DRAM controller
Addressing to DRAM(IC16) of the system and control and refresh
control of RAS and CAS signals are executed.
6
Timer and watch dog timer
7
General-purpose I/O port
Control of Liu and control of analog process of read signals are
executed.
8
Clock oscillation
Crystal oscillator of 19.66 MHz is connected for operation of 19.66
MHz.
9
Generation of alarm sound and ringer sound
The keys on the operation panel are pressed to respectively gener-
ate the key input sound, alarm sound and ringer sound.
2) 27C160 (IC4): pin-42, DIP (EPROM)
Programs are stored in a 16 Mbit ROM.
3) HY5118164 or MSM5118165 (IC16): pin-42, SOJ (DRAM)
Used as the system memory of main CPU and transmission buffer of
communication.
4) SM8578BV (IC30): pin-8, SOP (Real time clock IC)
It is oscillated with the quartz oscillator of 32.768 kHz, and the clock and
calendar functions are provided. Even if the power supply of the main
body is turned off, it is backed up with lithium battery. This device ex-
ecutes the clock-synchronous type serial communication with the gate
array (A), and CPU can know the time and date through the gate array
(A).
CHAPTER 5. CIRCUIT DESCRIPTION
[1] Circuit description
1. General description
In this machine, the facsimile control block except the printer control is
mainly composed of the units shown in Fig. 1.
2. PWB configuration
Fig. 1
1) Control PWB
The control PWB controls all the other operations except the printing
operation of the printer.
2) LIU PWB
The LIU PWB controls the I/F telephone function of the circuit with the
control signals from the control PWB.
3) CIS UNIT
CIS UNIT converts the image of the sending or copying draft into the
photoelectric signals and transmits the signals to the control PWB.
4) Operation panel PWB
The operation panel PWB detects the key input, turns on and off LED
and displays LCD according to the control signals from the control PWB.
5) Power supply PWB
DC voltages (+5V, +24V) are produced from AC120V, and are supplied
to the printer unit and control PWB unit.
6) PC I/F PWB (Option : FO-47IF)
An interface to PC is done by IEEE1284, and image data (bitmap) from
PC are outputted to the printer.
7) Memory PWB
The 2MByte image memory composed by flash memory which can be
supported. When FO-3MK (OPTION) installed, a capacity rise is possi-
ble to 5 MByte.
[2] Circuit description of control PWB
1. General description
The control PWB is composed of the following blocks.
1
Main control block
2
Image memory block
3
Modem block
4
Image signal process block
5
Speaker amplifier
6
Reading process and mechanical control block
7
Gate array (A) block
8
Gate array (B) block
9
CODEC block
F
Page memory block
G
Drive block
H
JBIG block
AC CORD
OPERATION PANEL
PWB
CONTROL PWB LIU PWB
LINE
CIS
UNIT
POWER SUPPLY PWB
PRINTER
PWB
PRINTER
UNIT
PC I/F PWB
(OPTION : FO-47IF)
MEMORY
PWB