Revision 1.0 STD – February 2010
Page 20 of 31
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SX1233SKA
USER GUIDE
Figure 22: RSSI Window
5.3.5 Continuous-Time Digital AGC
The AGC dynamic range can be enhanced in V2c silicon (chip version 2.3) with the default mode of
operation of DAGC enabled. Note that the DAGC mode of operation is automatically configured by the
GUI depending upon whether AFC low beta is enabled (see section 5.3.3).
Pease refer to the SX1233 datasheet for further information on the implementation of the continuous-time
DAGC function.
Figure 23: DAGC Window
5.4 Irq & Mapping Configuration Register Tab
The Irq & Mapping Configuration Register Tab is illustrated in Figure 24. Please refer to the SX1233 for a
full description of the irq and mappings for each mode of operation of the SX1233.
Configuration register value entries can be selected from the drop down menus besides each DIO listed.
Note that when necessary the GUI will automatically re-configure DIO mappings (i.e. Packet Handler
operation).
Please refer to Table 1 and Table 2, below, for the available DIO mappings of the SX1233 in continuous
and packet mode, respectively.
Mode
DIOx
Mapping
DIO5
DIO4
DIO3
DIO2
DIO1
DIO0
