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Seco Q7-A75-J, User Manual

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Seco Q7-A75-J User Manual Download Page 18

 

 

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Q7-A75-J

 

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Q7-A75-J User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.B. - Reviewed by P.Z. -  Copyright © 2016 SECO S.r.l.  

18 

3.1

 

Introduction 

According to Qseven

®

 specifications, all interfaces to the board are available through a single card edge connector. 

 

 

 

TOP SIDE 

Card edge golden 

finger, pin 228 

Card edge golden 

finger, pin 2 

Card edge golden 

finger, pin 1 

Card edge golden 

finger, pin 229 

BOTTOM SIDE 

Summary of Contents for Q7-A75-J

Page 1: ...Q7 A75 J Extremely low power low cost Qseven Rel 2 0 Compliant Module with NXP i MX6 Processor...

Page 2: ...rt has been made to ensure the accuracy of this manual However SECO S r l accepts no responsibility for any inaccuracies errors or omissions herein SECO S r l reserves the right to change precise spec...

Page 3: ...1 7 Terminology and definitions 8 1 8 Reference specifications 10 OVERVIEW 11 Chapter 2 2 1 Introduction 12 2 2 Technical Specifications 13 2 3 Electrical Specifications 14 2 3 1 Power Consumption 14...

Page 4: ...ion 1 0 Last Edition 1 0 Author S B Reviewed by P Z Copyright 2016 SECO S r l 4 Chapter 1 Warranty Information and assistance RMA number request Safety Electrostatic Discharges RoHS compliance Termino...

Page 5: ...RMA authorisation number must be put both on the packaging and on the documents shipped with the items which must include all the accessories in their original packaging with no signs of damage to or...

Page 6: ...center it is possible to send the faulty product to the SECO Repair Centre In this case follow this procedure o Returned items must be accompanied by a RMA Number Items sent without the RMA number wil...

Page 7: ...vice high voltages caused by static electricity could damage some or all the devices and or components on board 1 6 RoHS compliance The Q7 A75 J module is designed using RoHS compliant components and...

Page 8: ...rd generation DVI Digital Visual interface a type of display video interface FFC FPC Flexible Flat Cable Flat Panel Cable GBE Gigabit Ethernet Gbps Gigabits per second GND Ground GPI O General purpose...

Page 9: ...e SD standard that allows the use of the same SD interface to drive different Input Output devices like cameras GPS Tuners and so on SM Bus System Management Bus a subset of the I2C bus dedicated to c...

Page 10: ...eets BreakoutBoards I2SBUS pdf LVDS http www ti com ww en analog interface lvds shtml and http www ti com lit ml snla187 snla187 pdf MIPI http www mipi org MMC eMMC http www jedec org committees jc 64...

Page 11: ...First Edition 1 0 Last Edition 1 0 Author S B Reviewed by P Z Copyright 2016 SECO S r l 11 Chapter 2 Introduction Technical Specifications Electrical Specifications Mechanical Specifications Supporte...

Page 12: ...to work as two independent 24 bit Single Channel interfaces The other display interface is i MX6 s native HDMI interface HW video decoding of the most common coding standard i e H 264 MPEG2 MPEG4 DivX...

Page 13: ...lso consider that a portion of disk capacity will be used by internal Flash Controller for Disk management so final capacity will be lower Networking FastEthernet 10 100 Mbps interface USB 1 x USB OTG...

Page 14: ...ectly through card edge fingers see connector s pinout All remaining voltages needed for board s working are generated internally from VCC power rail 2 3 1 Power Consumption TBM 2 3 2 Power Rails mean...

Page 15: ...dard When using different connector heights please consider that according to Qseven specifications components placed on bottom side of Q7 A75 J will have a maximum height of 2 2mm 0 1 Keep this value...

Page 16: ...gram USB OTG USB 2 0 HOST I2C SPI Audio External SD PCI Express LVDS 0 1 HDMI GP I Os Fast Ethernet MFG Embedded MMC Drive NXP i MX6 Processor Micrel KSZ8091RN Ethernet Transceiver DDR3 System Memory...

Page 17: ...Q7 A75 J Q7 A75 J User Manual Rev First Edition 1 0 Last Edition 1 0 Author S B Reviewed by P Z Copyright 2016 SECO S r l 17 Chapter 3 Introduction Connectors description...

Page 18: ...right 2016 SECO S r l 18 3 1 Introduction According to Qseven specifications all interfaces to the board are available through a single card edge connector TOP SIDE Card edge golden finger pin 228 Car...

Page 19: ...X6 processors For accurate signals description please consult the following paragraphs In the first instance the signals with exclusive functionality will be described thoroughly After them it will be...

Page 20: ...DIO I O SDIO_DAT2 51 52 SDIO_DAT5 I O SDIO SDIO I O SDIO_DAT4 53 54 SDIO_DAT7 I O SDIO SDIO I O SDIO_DAT6 55 56 USB_DRIVE_VBUS I Muxed functionalities PWR GND 57 58 GND PWR AUDIO O HDA_SYNC 59 60 SMB_...

Page 21: ...B3 O LVDS LVDS O LVDS_A3 115 116 LVDS_B3 O LVDS PWR GND 117 118 GND PWR LVDS O LVDS_A_CLK 119 120 LVDS_B_CLK O LVDS LVDS O LVDS_A_CLK 121 122 LVDS_B_CLK O LVDS LVDS LVDS_BLT_CTRL GP_PWM_OUT0 123 124 H...

Page 22: ...GND PWR N A N C 167 168 N C N A N A N C 169 170 N C N A UART O UART0_TX 171 172 UART0_RTS O UART N A N C 173 174 N C N A N A N C 175 176 N C N A UART I UART0_RX 177 178 UART0_CTS I UART PCI E O PCIE0_...

Page 23: ...O S r l 23 N A N C 207 208 MFG_NC2 N A MFG MFG N A MFG_NC1 209 210 N C N A PWR VCC 211 212 VCC PWR PWR VCC 213 214 VCC PWR PWR VCC 215 216 VCC PWR PWR VCC 217 218 VCC PWR PWR VCC 219 220 VCC PWR PWR V...

Page 24: ...to provide for a buffer on the carrier board 3 2 1 2 UART interface signals According to the Qseven Rel 2 0 specifications Q7 A75 J module offers one UART interface directly managed by i MX6 processo...

Page 25: ...and Low Speed LS in Host mode and HS FS in peripheral mode It is carried out directly to the golden finger connector USB 2 0 controller Core 1 can work only in Host mode and can work in HS FS and LS i...

Page 26: ...level 3P3V_S with 10k pull up resistor This signal must be externally pulled low to signal that a SDIO MMC Card is present SDIO_CLK Clock Line output 52MHz maximum frequency for MMC High Speed Mode 5...

Page 27: ...S HDA_RST AC 97 I2S Codec Reset Active Low signal Output from the module to the Carrier board electrical level 3 3V_S HDA_BCLK AC 97 24MHz Serial Bit Clock or I2S Serial Data Clock signal Output from...

Page 28: ...ata pair 0 LVDS_A1 LVDS_A1 LVDS Channel 0 differential data pair 1 LVDS_A2 LVDS_A2 LVDS Channel 0 differential data pair 2 LVDS_A3 LVDS_A3 LVDS Channel 0 differential data pair 3 LVDS_A_CLK LVDS_A_CLK...

Page 29: ...dded in the i MX6 processors it is not necessary to implement voltage level shifter for TMDS differential pairs on the Carrier board It is still necessary however to implement voltage level shifters o...

Page 30: ...l with 10k pull up resistor When working in ATX mode this signal can be connected to a momentary push button a pulse to GND of this signal will switch power supply On or Off RSTBTN Reset Button Input...

Page 31: ...w signal 3P3V_S voltage with 10k pull up resistor This signal can be used to reset and restart via Hardware the internal Watchdog Timer which is usually managed via Software using Q7 A75 J dedicated A...

Page 32: ...s that the standard function is managed through SECO BSP it is not native of the i MX6 processor Port MXM Pin MXM Pin Name Qseven function group i MX6 Pad name i MX6 Signal for standard function i MX6...

Page 33: ...UART2_TX_DATA GPIO2_IO15 55 SDIO_DAT6 SD4_DAT6 SD4_DATA6 UART2_CTS_B GPIO2_IO14 7 59 HDA_SYNC AC97_SYNC I2S_WS AC 97 I2S Audio DI0_PIN3 AUD6_TXFS GPIO4_IO19 61 HDA_RST AC97_RST I2S_RST SD2_CMD AUD_RST...

Page 34: ...15 185 LPC_AD0 GPIO0 GPIO SD1_DAT0 GPIO1_IO16 SD1_DATA0 186 LPC_AD1 GPIO1 SD1_DAT1 GPIO1_IO17 SD1_DATA1 PWM3_OUT 187 LPC_AD2 GPIO2 SD1_DAT2 GPIO1_IO19 SD1_DATA2 188 LPC_AD3 GPIO3 SD1_DAT3 GPIO1_IO21...

Page 35: ...XM PCIE_TX_N 182 PCIE0_RX PCIE_RXM PCIE_RX_N 20 124 GP_1 Wire_Bus HDMI EIM_A25 HDMI_TX_CEC_LINE GPIO5_IO02 131 DP_LANE3 TMDS_CLK HDMI_CLKP HDMI_TX_CLK_P 133 DP_LANE3 TMDS_CLK HDMI_CLKM HDMI_TX_CLK_N 1...

Page 36: ..._DATA1_N 107 eDP0_TX2 LVDS_A2 LVDS0_TX2_P LVDS0_DATA2_P 108 eDP1_TX2 LVDS_B2 LVDS1_TX2_P LVDS1_DATA2_P 109 eDP0_TX2 LVDS_A2 LVDS0_TX2_N LVDS0_DATA2_N 110 eDP1_TX2 LVDS_B2 LVDS1_TX2_N LVDS1_DATA2_N 111...

Page 37: ...TG_DN USB_OTG_DN 94 USBP0 USB_H1_DN USB_H1_DN 95 USBP1 USB_OTG_DP USB_OTG_DP 96 USBP0 USB_H1_DP USB_H1_DP 24 7 GBE_LINK100 Ethernet 10 100 BT Not coming from i MX6 processor but from KSZ8091RN GBE_LIN...

Page 38: ...Q7 A75 J Q7 A75 J User Manual Rev First Edition 1 0 Last Edition 1 0 Author S B Reviewed by P Z Copyright 2016 SECO S r l 38 Chapter 4 Thermal Design...

Page 39: ...t exchange between the module and the heatspreader The heatspreader is not intended to be a cooling system by itself but only as means for transferring heat to another surface cooler like heatsinks fa...

Page 40: ...7 A75 J User Manual Rev First Edition 1 0 Last Edition 1 0 Author S B Reviewed by P Z Copyright 2016 SECO S r l 40 SECO Srl Via Calamandrei 91 52100 Arezzo ITALY Ph 39 0575 26979 Fax 39 0575 350210 ww...

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