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© Sealevel Systems, Inc.
SeaI/OUSBSERIAL | SL9177 04/2022
Appendix D - Asynchronous Communications
Serial data communications implies that individual bits of a character are transmitted consecutively to a receiver
that assembles the bits back into a character. Data rate, error checking, handshaking, and character framing
(start/stop bits) are pre-defined and must correspond at both the transmitting and receiving ends.
Asynchronous communications is the standard means of serial data communication for PC compatibles and
PS/2 computers. The original PC was equipped with a communication or COM: port that was designed around
an 8250 Universal Asynchronous Receiver Transmitter (UART). This device allows asynchronous serial data to
be transferred through a simple and straightforward programming interface. A starting bit followed by a pre-
defined number of data bits (5, 6, 7, or 8) defines character boundaries for asynchronous communications. The
end of the character is defined by the transmission of a pre-defined number of stop bits (usually 1, 1.5 or 2). An
extra bit used for error detection is often appended before the stop bits.
This special bit is called the parity bit. Parity is a simple method of determining if a data bit has been lost or
corrupted during transmission. There are several methods for implementing a parity check to guard against data
corruption. Common methods are called (E)ven Parity or (O)dd Parity. Sometimes parity is not used to detect
errors on the data stream. This is referred to as (N)o parity. Because each bit in asynchronous communications
is sent consecutively, it is easy to generalize asynchronous communications by stating that each character is
wrapped (framed) by pre-defined bits to mark the beginning and end of the serial transmission of the character.
The data rate and communication parameters for asynchronous communications have to be the same at both
the transmitting and receiving ends. The communication parameters are baud rate, parity, number of data bits
per character, and stop bits (i.e., 9600, N, 8, 1).
Remain Idle o
r
next start bit
Odd, Even
or
Unused
STOP
P
BIT
5
to 8 Data Bits
Idle state of
line
1
0
1
1.5
2
