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© Sealevel Systems, Inc. 5103 Manual | SL9075 7/2021
Technical Description
The ACB-232.LPCI
utilizes the Zilog 85230
E
nhanced
S
erial
C
ommunications
C
ontroller (ESCC). This chip
features programmable baud rate, data format and interrupt control. Refer to the ESCC
User’s Manual
for
details on programming the 85230 ESCC chip.
Features
•
One channel of synchronous or asynchronous communications using the Zilog Z85230 chip
•
EIA/TIA-232 Signals supported TD, RD, CTS, RTS, DCD, DSR, DTR, TXC, RXC, TSET, RI
•
Programmable options for Transmit clock as input or output
•
Software programmable baud rate
Internal Baud Rate Generator
The baud rate of the ESCC is programmed under software control. The standard oscillator supplied with
the board is 7.3728 MHz However, other oscillator values can be substituted to achieve different baud rates.
I/O Registers Definition - Control and Status
The control and status registers occupy 16 consecutive locations. The following tables provide a functional
description of the bit positions.
X = do not care
{ }= always this value
Address
Mode
D7
D6
D5
D4
D3
D2
D1
D0
Base+4
RD
{0}
IRQST
{0}
{0}
{0}
{0}
{0}
{0}
Base+4
WR
X
X
X
X
X
X
X
X
Base+5
RD
{0}
{0}
SYNCA_RTS SYNCA_CTS
{0}
{0}
{0}
{0}
Base+5
WR
X
X
SYNCA_RTS SYNCA_CTS
X
X
X
X
Base+6
RD
{0}
{0}
{0}
TXOUT
RIOUT
DSROUT
TSETSLA
RXCOPTA
Base+6
WR
X
X
X
TXOUT
RIOUT
DSROUT
TSETSLA
RXCOPTA
Base+14
RD
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
Base+15
RD
SD15
SD14
SD13
SD12
SD11
SD10
SD9
SD8
