Schweitzer Engineering Laboratories SEL-351-5, Instruction Manual

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5.15
Date Code 20070117
Instruction Manual SEL-351-5, -6, -7 Relay
Trip and Target Logic
Permissive Overreaching Transfer Trip (POTT) Logic
q Figure 5.6 .
Figure 5.5 Permissive Input Logic Routing to POTT Logic
Also note that SEL
OGIC
control equation setting PT1 in Figure 5.7 is routed to
control Relay Word bit PTRX if enable setting ECOMM = POTT. Relay Word
bit PTRX is the permissive trip receive input into the trip logic in
Figure 5.1 .
Timer Settings
See Section 9: Setting the Relay for setting ranges.
Z3RBD—Zone (Level) 3 Reverse Block Delay
Current-reversal guard timer—typically set at 5 cycles.
EBLKD—Echo Block Delay
Prevents echoing of received PT for settable delay after dropout of local
permissive elements in trip setting TRCOMM—typically set at 10 cycles. Set
to OFF to defeat EBLKD.
ETDPU—Echo Time Delay Pickup
Sets minimum time requirement for received PT, before echo begins—
typically set at 2 cycles. Set to OFF for no echo.
EDURD—Echo Duration
Limits echo duration, to prevent channel lockup—typically set at 3.5 cycles.
Logic Outputs
The following logic outputs can be tested by assigning them to output
contacts. See
Output Contacts on page 7.32 for more information on output
contacts.
Z3RB—Zone (Level) 3 Reverse Block
Current-reversal guard asserted (operates as an input into the trip logic in
Figure 5.1 and the DCUB logic in Figure 5.10 ).
ECTT—Echo Conversion to Trip
PT received, converted to a trip condition for a Weak-Infeed Condition
(operates as an input into the trip logic in
Figure 5.1 ).
Relay
Word
Bit
PT1
ECOMM = DCUB2
SEL
OGIC
Settings
PT
to POTT
Logic
q
Setting
PT2
ECOMM = DCUB1
Setting
ECOMM = POTT
Setting