MSR120D Programmer’s Manual UDN PM009 Rev. E
Table of Contents 2005/2/23
Table 5-19. Data Block Channel B, Tk2 ______________________________________________ 20
K2C type start end (4Bh 32h 43h type start end) ______________________________________ 21
－
Set Transmitting Data Block, Channel C of Track 2 _________________________________ 21
Table 5-20. Data Block Channel C, Tk2 ______________________________________________ 21
K3A type start end (4Bh 33h 41h type start end) ______________________________________ 21
－
Set Transmitting Data Block, Channel A of Track 3 _________________________________ 21
Table 5-21. Data Block Channel A, Tk3 ______________________________________________ 21
K3B type start end (4Bh 33h 42h type start end) ______________________________________ 21
－
Set Transmitting Data Block, Channel B of Track 3 _________________________________ 21
Table 5-22. Data Block Channel B, Tk3 ______________________________________________ 21
K3C type start end (4Bh 33h 43h type start end) ______________________________________ 21
－
Set Transmitting Data Block, Channel C of Track 3 _________________________________ 21
Table 5-23. Data Block Channel C, Tk3 ______________________________________________ 21
DF0 (44h 46h 00h)
－
Default Setting _______________________________________________ 21
RE0 (52h 45h 00h)
－
Read EEPROM Data __________________________________________ 22
Byte1 and 2 in EEPROM are 00h, 13h separately. They are identical characters. _________________ 22
Byte 3 in EEPROM_________________________________________________________________ 22
Byte 4 in EEPROM_________________________________________________________________ 22
Byte 5 in EEPROM_________________________________________________________________ 23
Byte 6 in EEPROM: Track Separator Setting_____________________________________________ 23
Byte 7-12 in EEPROM: Track 1 Prefix Code Setting_______________________________________ 23
Byte 13-18 in EEPROM: Track 2 Prefix Code Setting______________________________________ 23
Byte 19-24 in EEPROM: Track 3 Prefix Code Setting______________________________________ 23
Byte 25-30 in EEPROM: Track 1 Suffix Code Setting _____________________________________ 23
Byte 31-36 in EEPROM: Track 2 Suffix Code Setting _____________________________________ 23
Byte 37-42 in EEPROM: Track 3 Suffix Code Setting _____________________________________ 23
Byte 43-45 in EEPROM: Channel A of Track 1 Setting ____________________________________ 23
Byte 47-49 in EEPROM: Channel B of Track 1 Setting_____________________________________ 23
Byte 51-53 in EEPROM: Channel C of Track 1 Setting_____________________________________ 23
Byte 55-57 in EEPROM: Channel A of Track 2 Setting ____________________________________ 23
Byte 59-61 in EEPROM: Channel B of Track 2 Setting_____________________________________ 23
Byte 63-65 in EEPROM: Channel C of Track 2 Setting_____________________________________ 23
Byte 67-69 in EEPROM: Channel A of Track 3 Setting ____________________________________ 23
Byte 71-73 in EEPROM: Channel B of Track 3 Setting_____________________________________ 23
Byte 75-77 in EEPROM: Channel C of Track 3 Setting_____________________________________ 23
Byte 78-83 in EEPROM: Reserved. ____________________________________________________ 23
Byte 84 in EEPROM: Raw Data Output Mode Setting. _____________________________________ 23
Bit-0 = 1 is enable and bit-0 = 0 is disable. Bit 1-7 is 0._____________________________________ 23
Byte 85-98 in EEPROM: Reserved. ____________________________________________________ 23
Page VI
Total 42 pages
