5. System Diagram
5. System Diagram
5.1. Block Diagram
M a in
Board
Block D iagram
SL-C 480
series
A 2 0 0 0
Cortex-A9 800MHz
Cortex-R4 400MHz
RAM controller
GPIO
MAC
UART
I2C
Step Motor
Image Processor
Local controller
USB 2.0
ADC 8CH
LSU
controller
HPVC
PLL
EEPROM
32KB
Nand
Flash
128MB
C LO C K
G EN ER ATO R
SD A
SC L
DDR3
128MB
A4984
R EF_C LK
M C LK
U SB H _C LK
12M H z
C O N TR O L
C R U M
Y
C R U M
M
C R U M
C
C R U M
K
C R U M
Jo in t
&
O u ter
T E M P .
&
O P C
K E Y
3p
3p
3p
3p
6p
L S U
Pol
ygon M otor
LD B
¡¯
d
5p
9p
16p
U S B
H O S T
D IR E C T
U S B
D E V IC E
4p
5p
T 2
c lu tc h
2p
L A N
14p
N etew ork m odelonly
M O D E M
S pea k er
4in1 O nly
P ic k u p
c lu tc h
IT B
c lu tc h
D E V E
c lu tc h
C o n n ec tio n
I/ F
B ¡¯d
D E V E
H O M E
sen so r
R eg i
c lu tc h
2p
3p
24p
2p
2p
2p
10p
SD IO
12p
W -
L A N
M o d u le
W ireless M odelonly
C IS
16p
10p
B L D C
M o to r
(M A IN )
O P E
P A N E L
L C D
/
M IC O M
13p
S C A N
H O M E
S E N S O R
3p
IT B
H O M E
sen so r
&
In n er
T E M P .
5p
O u tb in
fu ll
sen so r
3p
W a ste
T o n er
T X
&
R X
H V P S
T 1
T 2
C H A R G E R
D eve
S u pply
D eve
B ia s
D eve
D r .B la d e
27p
4p
F A N
2p
F r o n t
C o ver
o pen
2p
F A N
N C
E X IT
sen so r
3p
E R A S E R
L A M P
2p
R ea r
C o ver
o pen
2p
S M P S
+24V /+5V
C ontrolSi
gnal
FuserAC
14p
F U S E R
LAM P
Therm i
stor
2p
2p
C T D
S E N S O R
S c a n
m o to r
3p
E m pty
sen so r
R eg i
sen so r
6p
3p
3p
2p
USB 3.0
5p
A D F
JO IN T
P B A
13p
3p
4p
P A P E R
P O S IT IO N
S E N S O R
P A P E R
D E T E C T IO N
S E N S O R
A D F
C O V E R
O P E N
S E N S O R
A D F
M O T O R
3p
3p
4in1 O nly
5-1
Copyright© 1995-2017 SAMSUNG. All rights reserved.