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STH-N375 Circuit diagrams
SAMSUNG Proprietary-Contents may change without notice
6-10
NOTE: BOOT SHOULD BE PULLED LOW FOR CABLE DETECTION
1
6
ENTER
BOARD_HOLE
PWR_END
UP = 2
RIGHT = 1
LEFT = 4
COMMON = 3
*
#
CLR
7
5
2
SEND
NOTE: TDMA EVENT -SPARE TIMMING SIGNALS
DOWN = 5
JTAG
GREEN
NOTE: WAITING FOR REPLAY FROM SAMSUNG ABOUT C_F PIN
0
4
8
MENU
9
3
CENTER = 6
1
2
N375_BASE
RED
D202
3
100NF
C233
R236
ZD209
RB751S-40
100K
15PF
R223
C207
FC-255
Y201
22
22
R225
R256
0
S203
S208
S207
V/F1
18
27
V/F2
S204
RESERVED1
2
16
RI
RTS
20
RX_AUDIO
7
11
TX_AUDIO
VBATT1
21
22
VBATT2
28
VBATT3
GND3
12
19
GND4
25
GND5
HP_PWR
15
NC
6
NC
29
30
NC
1
RESERVED0
C/F1
9
C/F2
26
13
DP_RX_DATA
14
DP_TX_DATA
3
DSR
DTR
24
8
GND1
GND2
10
CN201
17
CD
CHG+
4
5
CHG+
CTS
23
VCC
100K
R214
R209
100K
100NF
C230
R221
BVDD
VC040205X150R
22
C205
RV203
C208
100NF
OUT
1
VCC
15PF
U201
GND
3
2
1UF
C214
VCC
4
5
VCC
1
2
3
4
5
ZD203
1
2
3
22
ZD201
R208
R224
R216
47K
100NF
100K
47PF
C212
100
R247
C221
RV204
VAUX
45
6
VC040205X150R
U205
1
2
3
VBAT
100NF
100NF
C210
C211
BATT
VCC
4
5
NC
R242
5
ZD208
1
2
3
ZD206
1
2
3
4
C223
10NF
S202
C206
100NF
R241
R217
10K
5.1K
S211
S216
100NF
C201
P202
100NF
C213
F4
F2
VCTCXO_VDD
G1
WBDRX
WBDTX
G2
F1
XIN
XOUT
E1
TX_CLK
TX_DATA_1
K4
K3
TX_DATA_2
TX_SYNC
K1
T15
UBE
J1
VALID_STRB
F3
VCTCXO
VCTCXO_GND
E2
VCTCXO_PC
K14
TDMA_EVENT_1
G15
G16
TDMA_EVENT_2
B4
TEST1
C4
TEST2
TEST3
A3
B3
TESTER_MODE
J2
TX_BAT
K2
P2
SOUT_1
L16
T10
SOUT_2
SRAM_CS
P16
B8
STROB0
C8
STROB1
C10
STROB2
STROB3
D10
TBREAKPT
L3
N1
SCK2
SCLK
D9
SEN2
N3
N2
SI2
M16
SIN_1
SIN_2
T11
D11
SLOT_T
SO2
C9
A2
RESET
RF_BAND
J15
RI_N
T3
T6
RTS_N
RX_BAT
H13
RX_CLK
L4
L2
RX_DATA
RX_SYNC
PLL_STRB_1
PLL_STRB_2
J14
C2
POWER_FAIL
POWER_HOLD
C3
J16
PREAMP_G
D13
PWM_0
PWM_1
A9
B9
PWM_2
PWM_3
P1
PA_GATE
H16
PDM_0_N
D3
D2
PDM_0_P
D1
PDM_1_N
PDM_1_P
E4
K15
PLL_CLK
K16
PLL_DATA
J13
M15
T14
MEMOEB
T13
MEMWEB
MODE_STS
M2
B12
NOPC
NRW
C11
OSC_32K_GND
A1
P0
A6
D7
IVDD1
IVDD2
R16
A7
IVDD3
IVDD4
C7
G14
LOCK_DET
MAS0
A11
B11
MAS1
A12
MCLK
MEM8/16
C14
A13
GPIO_1_3
GPIO_1_4
B13
GPIO_1_5
C13
GP_OUT
F13
IFIC_RESET
H3
IRDA_RXD
T7
T9
IRDA_TXD
R1
E14
E15
GPIO_0_5
GPIO_0_6
E16
GPIO_0_7
D14
GPIO_0_8
D15
D16
GPIO_0_9
GPIO_1_0
A14
B14
GPIO_1_1
GPIO_1_2
C15
C16
GPIO_0_11
GPIO_0_12
B16
A16
GPIO_0_13
GPIO_0_14
A15
B15
GPIO_0_15
GPIO_0_2
F16
E13
GPIO_0_3
GPIO_0_4
D12
EX_TX_CLK
B6
C6
EX_TX_DATA
FBURST
A10
FLASH_CS
N16
M1
FSYNC
GPIO_0_0
F14
F15
GPIO_0_1
GPIO_0_10
T5
H4
D_IF_OUT
B10
D_IN
D_OUT
A8
EDD1
D4
EDD2
J4
EDD3
R8
H15
EDD4
EDD5
P1
T8
DGND3
DGND4
T16
H14
DGND5
DGND6
C12
D8
DGND7
DGND8
B7
T2
DSR_N
DTR_N
D4
D5
P12
N12
D6
D7
R13
P13
D8
D9
R14
T4
DCD_N
H1
DGND1
DGND2
D10
D11
P14
P15
D12
D13
N13
N14
D14
D15
N15
P11
D2
D3
N11
R12
BVDD
G4
CLK_SEL_0
CLK_SEL_1
G3
CS_RES1
M13
M14
CS_RES2
CTS_N
T1
N10
D0
D1
R11
R15
BB_JTAG_RESET
B5
BB_TCK
BB_TDI
C5
D6
BB_TDO
BB_TICE
A5
BB_TMS
D5
BIN
J3
BOOT_MODE
T12
C1
ARM_TCK
L15
ARM_TDI
ARM_TDO
L14
ARM_TMS
L13
L1
AUX_CLK
M3
AUX_DATA
AUX_STRB
M4
H2
BBCLK
A4
A4
A5
R4
R5
A6
A7
N5
P5
A8
A9
R6
E3
AGND
G13
ALC_EN
K13
A16
A17
R9
P9
A18
A19
N9
R3
A2
R10
A20
A21
P10
A3
N4
P4
A0
A1
P3
P6
A10
A11
N6
R7
A12
A13
P7
N7
A14
A15
P8
N8
U203
B2
32K_XIN
32K_XOUT
B1
R2
C229
S206
2
3
1
100NF
P204
Q204
6
SW201
1
5
4
3
2
7
8
R211
100K
5.1K
R240
U206
2
GND
SRT
1
VCC1
4
3
VCC2
_RESET
5
R212
330K
VCC
VCC
C209
100NF
S215
CN202-1
BIT-03S
AU201
ZD210
RB751S-40
100NF
R218
20K
C216
VC040205X150R
RV202
ZD207
1
2
3
4
5
IVCC
BVDD
RX
HPPWR
TX
P201
P206
C222
47PF
ZD204
1
2
3
4
5
R201
10K
1
2
3
4
5
S214
ZD202
1
2
3
4
5
ZD205
VCC
100NF
C220
S212
S210
100K
S205
VCC
R248
2
R204
270K
Q203
R
1
3
GND
100K
R206
2
3
1
BATT
Q206
BATT
P205
S209
S213
S218
1
2
R205
1M
22
R255
R207
100K
R213
VCC
4.7K
C215
100NF
VCC
D203
NC
R246
S217
AVCC
VCC
R245
4.7K
VCC
Q207
1
3
2
DAN222TL
D201
3
1
2
ZD211
C202
100NF
BOOT
S-WE# B8
E4
VPP
H10
G10
S-CS1#
S-CS2 D8
S-LB# F3
S-OE# F5
F4
S-UB#
S-VCC
D9
S-VSS
D3
H12
A2
NC2
NC3
A11
NC4
A12
NC5
C4
H1
NC6
NC7
H2
H3
NC8
NC9
D10
F-VCCQ
A10
F-VSS
H8
A9
F-VSS
F-WE#
C3
F-WP# E3
A1
NC1
H11
NC10
NC11
C10
DQ5
DQ6
C8
B10
DQ7
DQ8
F8
F7
DQ9
F-CE# H7
H9
F-OE#
D4
F-RP#
F-VCC
E6
DQ11
DQ12
D7
C7
DQ13
DQ14
B9
B7
DQ15
DQ2
E9
E10
DQ3
DQ4
C9
H4
A5
A6 G6
G5
A7
A8 B4
B6
A9
DQ0
F9
F10
DQ1
DQ10
E8
B3
G4
A17
A18 G3
E5
A19
A2 G8
A3
A20
G7
A3
A4 H5
H6
G9
A1
A10 B5
A4
A11
A12 A8
A7
A13
A6
A14
A5
A15
A16
U202
A0
R237
10
100NF
P203
C234
47K
R239
C203
10PF
ALT_LED
BATT
REED_SW
KEY(0)
HM_STROB
BATT
SOUT_2
HM_STROB
CD
HP_PWR
DSR
DP_TX_DATA
DP_RX_DATA
CTS
DTR
RTS
DTR
CTS
RTS
CD
RI
HP_PWR
DP_RX_DATA
DP_TX_DATA
DSR
BOOT
ADD(0)
SRAM_CS
FLASH_CS
RST
UBE
MEMWEB
MEMOEB
KEYLED_EN
BATT
SVC_LED
ADD(13)
ADD(12)
ADD(11)
ADD(10)
ADD(9)
ADD(8)
ADD(7)
ADD(6)
ADD(5)
ADD(4)
ADD(3)
ADD(2)
ADD(0:21)
ADD(1)
DATA(15)
DATA(14)
DATA(13)
DATA(12)
DATA(11)
DATA(10)
DATA(9)
DATA(8)
DATA(7)
DATA(6)
DATA(5)
DATA(4)
DATA(3)
DATA(2)
DATA(1)
DATA(0:15)
DATA(0)
RI
ADD(21)
ADD(20)
ADD(19)
ADD(18)
ADD(17)
ADD(16)
ADD(15)
ADD(14)
ADD(13)
ADD(12)
ADD(11)
ADD(10)
ADD(9)
ADD(8)
ADD(7)
ADD(6)
ADD(5)
ADD(4)
ADD(3)
ADD(2)
ADD(0:21)
ADD(1)
RST
FLASH_WP
ADD(21)
ADD(20)
ADD(19)
ADD(18)
ADD(17)
ADD(16)
ADD(15)
ADD(14)
FLASH_WP
HS_SENSE
AMP_EN
MIC_BIAS_EN
VIBRATOR
IF_ON
KEY(0)
KEY(1)
KEY(2)
SCAN(0)
SCAN(1)
SCAN(2)
SCAN(3)
SCAN(4)
SCAN(5)
DATA(15)
DATA(14)
DATA(13)
DATA(12)
DATA(11)
DATA(10)
DATA(9)
DATA(8)
DATA(7)
DATA(6)
DATA(5)
DATA(4)
DATA(3)
DATA(2)
DATA(1)
DATA(0)
ADD(0)
WBDTX
VALID_STRB
BIN
IFIC_RESET
D_IF_OUT
LOCK_DET
PLL_DATA
PLL_CLK
PLL_STRB1
RX_BAT
TX_BAT
PA_GATE
PREAMP_G
ALC_EN
ARM_TMS
ARM_TDO
ARM_TDI
PDM
DP_RX_DATA
DP_TX_DATA
DO
SCLK
VCTCXO_PC
POWER_HOLD
RST
SOUT_2
RTS
DTR
CD
RI
DSR
CTS
SCAN(7)
RINGER
BACKLIGHT
ON_SW
VIBRATOR
ARM_TMS
ARM_TDO
ARM_TDI
MEMWEB
MEMOEB
UBE
FLASH_CS
SRAM_CS
DISPLAY_CS
BOOT
FSYNC
SEN
SCK
SI2
SO2
RX_SYNC
RX_DATA
RX_CLK
AUX_CLK
AUX_STRB
AUX_DATA
BBCLK
TX_CLK
TX_SYNC
TX_DATA1
MODE_STS
WBDRX
PON_LD
PON_TX
STRB1
REED_SW
SLOT_T
KEYLED_EN
ANALOG_DIG
BOOT
CLK_FIL
SCAN(7)
SCAN(5)
SCAN(4)
SCAN(0)
SCAN(3)
SCAN(2)
SCAN(1)
KEY(2)
KEY(1)
SCAN(0:7)
KEY(0:2)
KEY(2)
KEY(1)
KEY(0)
SCAN(1)
SCAN(2)
SCAN(3)
SCAN(4)
SCAN(5)
SLOT_T
ON_SW
TRST
ARM_TCK
AUX_ON
RX_AUDIO
SIN_2
SCLK
DO
SIN_2
SOUT_2
HP_PWR
BATT
PON_VRF3
DO
SCLK
STROB2
SVC_LED
ALT_LED
RX_AUDIO
TX_AUDIO
SOUT_2
SIN_2
STROB2
PLL_ON
SIN_2
ON_SW_SENSE
SEND_END
VCTCXO_IN
DATA(0:15)
SCAN(7)
BOOT
4. BASE Circuit Diagram