STH-N271 Circuit diagrams
SAMSUNG Proprietary-Contents may change without notice
11-10
2
#
C234(225,226,227,228,229)
6
AU201
NOTE: BOOT SHOULD BE PULLED LOW FOR CABLE DETECTION
NOTE: LAYOUT AND SHIELDING IRDA DEVICE IS CRITICAL
D212
5
8
CN202
CLR
SEND
1
ENTER
PWR_END
JTAG
9
RED
Y201
4
R248(R202,219)
0
Q206
BT201
TP220
ZD210
3
RV205
SCROLL
MENU
STH-N271_BASE
NOTE: TDMA EVENT -SPARE TIMMING SIGNALS
*
NOTE: WAITING FOR REPLAY FROM SAMSUNG ABOUT C_F PIN
U208(207)
7
GREEN
R240
22
5.1K
VAUX
R221
R229
22
ZD210
3
1
2
HPPWR
S20
1
2
D202
S14
1
2
R228
22
C205
100NF
1
2
22
R234
NC
C224
S5
100NF
C216
C206
RX
100NF
C210
100NF
BATT
VBAT
BOOT
S8
1
2
C221
47PF
C201
100NF
BVDD
VCC
VCC
D208
C220
100NF
E2
VCTCXO_PC
F4
F2
VCTCXO_VDD
G1
WBDRX
WBDTX
G2
F1
XIN
XOUT
E1
TX_BA
T
K2
TX_CLK
TX_DA
T
A_1
K4
K3
TX_DA
T
A_2
TX_SYNC
K1
T15
UBE
J1
VALID_STRB
F3
VCTCXO
VCTCXO_GND
D10
TBREAKPT
K14
TDMA_EVENT_1
G15
G16
TDMA_EVENT_2
TEST1
B4
C4
TEST2
TEST3
A3
B3
TESTER_MODE
J2
SLOT_T
SO2
P2
SOUT_1
L16
T10
SOUT_2
SRAM_CS
P16
B8
STROB0
STROB1
C8
C10
STROB2
STROB3
RX_DATA
RX_SYNC
L3
N1
SCK2
SCLK
D9
SEN2
N3
N2
SI2
M16
SIN_1
SIN_2
T11
D1
1
PWM_2
PWM_3
C9
A2
RESET
RF_BAND
J15
RI_N
T3
T6
R
TS_N
RX_BA
T
H13
RX_CLK
L4
L2
K16
J13
PLL_STRB_1
PLL_STRB_2
J14
C2
POWER_FAIL
POWER_HOLD
C3
J16
PREAMP_G
D13
PWM_0
PWM_1
A9
B9
A6
D7
P1
P
A_GA
TE
H16
PDM_0_N
D3
D2
PDM_0_P
D1
PDM_1_N
PDM_1_P
E4
K15
PLL_CLK
PLL_DA
T
A
MCLK
MEM8/16
M15
MEMOEB
T14
T13
MEMWEB
MODE_STS
M2
B12
NOPC
NR
W
C1
1
OSC_32K_GND
A1
P0
IRDA_TXD
R1
IVDD1
IVDD2
R16
A7
IVDD3
IVDD4
C7
G14
LOCK_DET
MAS0
A1
1
B1
1
MAS1
A12
GPIO_1_1
GPIO_1_2
C14
A13
GPIO_1_3
GPIO_1_4
B13
C13
GPIO_1_5
GP_OUT
F13
IFIC_RESET
H3
IRDA_RXD
T7
T9
GPIO_0_3
GPIO_0_4
E14
E15
GPIO_0_5
GPIO_0_6
E16
D14
GPIO_0_7
GPIO_0_8
D15
D16
GPIO_0_9
GPIO_1_0
A14
B14
GPIO_0_1
GPIO_0_10
C15
C16
GPIO_0_1
1
GPIO_0_12
B16
A16
GPIO_0_13
GPIO_0_14
A15
B15
GPIO_0_15
GPIO_0_2
F16
E13
EDD4
EDD5
D12
EX_TX_CLK
B6
C6
EX_TX_DA
T
A
FBURST
A10
N16
FLASH_CS
M1
FSYNC
GPIO_0_0
F14
F15
DSR_N
DTR_N
T5
H4
D_IF_OUT
B10
D_IN
D_OUT
A8
EDD1
D4
J4
EDD2
EDD3
R8
H15
DGND1
DGND2
P1
T8
DGND3
DGND4
T16
H14
DGND5
DGND6
C12
D8
DGND7
DGND8
B7
T2
N11
R12
D4
D5
P12
N12
D6
D7
R13
P13
D8
D9
R14
T4
DCD_N
H1
R11
R15
D10
D11
P14
P15
D12
D13
N13
N14
D14
D15
N15
P11
D2
D3
T12
C1
BVDD
G4
CLK_SEL_0
CLK_SEL_1
G3
CS_RES1
M13
M14
CS_RES2
CTS_N
T1
N10
D0
D1
BBCLK
A4
BB_JT
AG_RESET
B5
BB_TCK
BB_TDI
C5
D6
BB_TDO
BB_TICE
A5
BB_TMS
D5
BIN
J3
BOOT_MODE
ALC_EN
K13
ARM_TCK
L15
ARM_TDI
ARM_TDO
L14
ARM_TMS
L13
L1
AUX_CLK
M3
AUX_DA
T
A
AUX_STRB
M4
H2
N4
P4
A4
A5
R4
R5
A6
A7
N5
P5
A8
A9
R6
E3
AGND
G13
P8
N8
A16
A17
R9
P9
A18
A19
N9
R3
A2
R10
A20
A21
P10
A3
B1
R2
A0
A1
P3
P6
A10
A11
N6
R7
A12
A13
P7
N7
A14
A15
U203
B2
32K_XIN
32K_XOUT
G
G
9
D209
SIDE-KEY
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
CN202
51
R232
R248
100K
R223
22
1UF
10
R237
1
2
C214
S19
1
2
15PF
C207
TX
S6
D211
VCC
R225
22
P201
R
V202
NC
AVCC
1
VCC
P202
R210
2
3
4
5
U201
GND
3
2
OUT
GND
ZD203
1
VBATT
1
2
3
4
5
1
2
3
4
5
ZD207
10PF
ZD201
C203
R209
100K
47K
R239
ZD209
C233
100NF
3
1
2
C222
47PF
S15
1
2
D201
VCC
E4
VPP
VCC
G10
S-CS1#
S-CS2 D8
S-LB# F3
S-OE# F5
F4
S-UB#
S-VCC
D9
S-VSS
D3
S-WE# B8
A2
NC2
NC3
A11
A12
NC4
NC5
C4
H1
NC6
NC7
H2
H3
NC8
NC9
H10
F-VSS
H8
A9
F-VSS
F-WE#
C3
F-WP# E3
NC1
A1
H11
NC10
NC11
H12
B10
DQ7
DQ8
F8
F7
DQ9
F-CE# H7
F-OE# H9
D4
F-RP#
F-VCC
D10
F-VCCQ
A10
C7
DQ13
DQ14
B9
B7
DQ15
DQ2
E9
E10
DQ3
DQ4
C9
C10
DQ5
DQ6
C8
G5
A7
A8 B4
B6
A9
DQ0
F9
F10
DQ1
DQ10
E8
E6
DQ11
DQ12
D7
G4
A17
A18 G3
E5
A19
A2 G8
A3
A20
G7
A3
A4 H5
H4
A5
A6 G6
G9
A1
A10 B5
A4
A11
A12 A8
A7
A13
A14 A6
A5
A15
A16 B3
U202
A0 H6
2
S10
1
100NF
C213
C230
100NF
R206
100K
BVDD
S7
1
2
100K
1
2
3
4
5
R213
47K
ZD204
10K
R208
ZD208
1
2
3
4
5
R217
C204
NC
Q204
2
3
1
5
S16
1
2
C218
NC
ZD202
1
2
3
4
D206
C209
22
100NF
R233
2.2K
R227
NC
C219
1
2
VCC
R241
5.1K
S18
1
2
S22
R212
P204
S9
1
2
330K
R
V204
R220
S12
1
2
22
S17
1
2
C211
100NF
51
R230
VCC
VCC
S13
1
2
R
V203
10NF
C223
NC
R215
D207
3
45
6
Y201
U205
1
2
1
2
S21
22
R226
R
V201
NC
R246
D205
ZD206
1
2
3
4
5
3
VCC2
_RESET
5
S4
1
2
U206
2
GND
SRT
1
VCC1
4
NC
R222
VCC
R238
P205
5.6K
P203
100K
R207
100K
1
2
3
45
6
R236
U204
22
R224
2
Q203
1
3
20K
R201
10K
R218
270K
R204
100K
R211
1
2
3
4
5
22
ZD205
R235
D204
R231
51
100NF
C234
C215
100NF
0
R245
R247
D210
100
R214
R243
NC
100K
BT201
2
1
VCC
Q206
2
3
1
P206
100K
IVCC
VCC
R242
R216
VCC
NC
C208
15PF
0
R244
1M
R205
1
RESERVED0
RESERVED1
2
RI
16
RTS
20
RX_AUDIO
7
11
TX_AUDIO
GND2
10
GND3
12
19
GND4
25
GND5
CTS
23
C/F1
9
C/F2
26
13
DP_RX_DATA
14
DP_TX_DATA
3
DSR
DTR
24
8
GND1
VCC
CN201
17
CD
100NF
C212
Q202
2
3
1
VCC
ARM_TDO
ARM_TMS
SLOT_T
RST
ARM_TCK
KEY(0)
KEY(1)
KEY(2)
SCAN(0)
SCAN(0)
ON_SW
SO2
PLL_ON
C_F
BOOT
GBOOT
VCC
HP_PWR
SOUT_2
SIN_2
VCTCXO_IN
BATT
SOUT_2
AUX_ON
HP_PWR
SCLK
SIN_2
DO
RX_AUDIO
C_F
SIN_2
SCLK
SOUT_2
V_F
DO
C_F
BATT
BATT
SI2
DP_RX_DATA
ON_SW
ARM_TDI
DTR
CTS
DP_RX_DATA
DP_TX_DATA
DSR
CD
RI
SIN_2
PON_TX
LED_EN
PDM
VCTCXO_PC
SEND_END
ON_SW_SENSE
AMP_EN
BOOT
GBOOT
CARR_ON
TX_AUDIO
RX_AUDIO
ALT_LED
AL
T_LED
TRST
SVC_LED
SVC_LED
CARR_ON
PON_VRF3
SCAN(7)
SCAN(4)
SCAN(3)
SCAN(2)
KEY(0:2)
SCAN(0:7)
KEY(0)
SCAN(1)
SCAN(5)
BOOT
ANALOG_DIG
LED_EN
SLOT_T
TX_RFBAND
V_F_EN
STRB1
PON_LD
DATA(0:15)
CLK_FIL
RST
SCAN(7)
V_F
KEY(1)
KEY(2)
RX_SYNC
SCK
SEN
FSYNC
DISPLAY_CS
SRAM_CS
FLASH_CS
UBE
MEMOEB
MEMWEB
EL_EN
SCAN(1)
SCAN(7)
RINGER
VIBRATOR
REED_SW
KEY(2)
KEY(0)
KEY(1)
SCAN(2)
SCAN(3)
SCAN(5)
SCAN(4)
POWER_HOLD
SCLK
DO
DP_TX_DA
T
A
ARM_TDO
ARM_TMS
RF_BAND
ALC_EN
PREAMP_G
P
A_GA
TE
TX_BA
T
RX_BA
T
PLL_STRB1
PLL_CLK
PLL_DA
T
A
LOCK_DET
D_IF_OUT
IFIC_RESET
BIN
VALID_STRB
WBDTX
WBDRX
MODE_STS
TX_DA
T
A
1
TX_SYNC
TX_CLK
BBCLK
AUX_DA
T
A
AUX_STRB
AUX_CLK
RX_CLK
RX_DATA
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
SCAN(0)
SCAN(1)
SCAN(2)
SCAN(3)
SCAN(5)
SCAN(4)
KEY(2)
KEY(1)
KEY(0)
IF_ON
VIBRA
T
O
R
MIC_BIAS_EN
HS_SENSE
FLASH_WP
CTS
DSR
RI
CD
DTR
RT
S
SOUT_2
ARM_TDI
REED_SW
ADD(1)
ADD(2)
ADD(3)
ADD(4)
ADD(5)
ADD(6)
ADD(7)
ADD(8)
ADD(9)
ADD(10)
ADD(11)
ADD(12)
ADD(13)
ADD(14)
ADD(15)
ADD(16)
ADD(17)
ADD(18)
ADD(19)
ADD(20)
ADD(21)
ADD(0:21)
ADD(0)
DATA(0)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(11)
DATA(12)
DATA(13)
DATA(14)
DATA(15)
ADD(1)
ADD(2)
ADD(3)
ADD(4)
ADD(5)
ADD(6)
ADD(7)
ADD(8)
ADD(9)
ADD(10)
ADD(11)
ADD(12)
ADD(13)
ADD(14)
ADD(15)
ADD(16)
ADD(17)
ADD(18)
ADD(19)
ADD(20)
ADD(21)
ADD(0:21)
FLASH_WP
RST
MEMOEB
MEMWEB
UBE
DATA(0)
FLASH_CS
SRAM_CS
ADD(0)
BOOT
DSR
DP_TX_DATA
DP_RX_DATA
HP_PWR
RI
CD
RTS
CTS
DTR
RTS
HP_PWR
DATA(0:15)
DATA(1)
DATA(2)
DATA(3)
DATA(4)
DATA(5)
DATA(6)
DATA(7)
DATA(8)
DATA(9)
DATA(10)
4. STH-N271 BASE Circuit Diagram