![background image](http://html.mh-extra.com/html/samsung/sgh-v200/sgh-v200_service-manual_1191205004.webp)
SAMSUNG Proprietary-Contents may change without notice
2. SGH-V200 Circuit Description
2-
1
1. SGH-V20
0
RF Circuit Description
1) RX PART
1. ASM(U1005)
→
Switching Tx, Rx path for GSM900, DCS1800 and PCS1900 by logic controlling.
2. ASM Control Logic (U701, U702, U703)
→
Truth Table
VC1
VC2
VC3
GSM Tx Mode
H
L
L
DCS / PCS Tx Mode
L
H
L
PCS Rx Mode
L
L
H
GSM / DCS Rx Mode
L
L
L
3. FILTER
To convert Electromagnetic Field Wave to Acoustic Wave and then pass the specific frequency band.
- GSM FILTER (C1003,C1004,L1001)
→
For filtering the frequency band between 925 ~ 960 MHz
- DCS FILTER (C1005,C1006,L1002)
→
For filtering the frequency band 1805 and 1880 MHz.
- PCS SAW FILTER (F1003)
→
For filtering the frequency band between 1930 and 1990 MHz
4. TC-VCXO (OSC801)
To generate the 13MHz reference clock to drive the logic and RF.
After additional process, the reference clock applies to the U900 Rx IQ demodulator and Tx IQ modulator.
The oscillator for RX IQ demodulator and Tx modulator are controlled by serial data to select channel and use fast lock
mode for GPRS high class operation.
5. Si 4200 (U901)
This chip integrates three differential-input LNAs.
The GSM input supports the E-GSM, DCS input supports the DCS1800, PCS input supports the PCS1900. The LNA
inputs are matched to the 200 ohm differential output SAW filters through eternal LC matching network.
Image-reject mixer downconverts the RF signal to a 100 KHz intermediate frequency(IF) with the RFLO from SI4133T
frequency synthesizer. The RFLO frequency is between 1737.8 ~ 1989.9 MHz.
The Mixer output is amplified with an analog programmable gain amplifier(PGA), which is controlled by AGAIN.
The quadrature IF signal is digitized with high resolution A/D converts (ADC).
6. Si 4201 (U900)
The SI4201 down-converts the ADC output to baseband with a digital 100 KHz quadrature LO signal. Digital decimation
and IIR filters perform channel selection to remove blocking and reference interface signals.
After channel selection, the digital output is scaled with a digital PGA, which is controlled with the DGAIN. DACs drive
a differential analog signal onto the RXIP, RXIN, RXQP, RXQN pins to interface to standard analog-input baseband IC.