27
NO
SYMBOL DESCRIPTIONS
NO
SYMBOL DESCRIPTIONS
1
MA3
MICOM ADDRESS INPUT
51
VDD
POWER SOURCE TERMINAL
2
MA4
MICOM ADDRESS INPUT
52
VDD
POWER SOURCE TERMINAL
3
MA5
MICOM ADDRESS INPUT
53
VSS
GROUND TERMINAL
4
MRD
MICOM READ SIGNAL INPUT
54
TEST0
TEST TERMINAL
5
MWR
MICOM WRITE SIGNAL INPUT
55
TEST1
TEST TERMINAL
6
MCE
CHIP ENABLE SIGNAL INPUT
56
TB2
TEST TERMINAL
7
KINT
INTERRUPT REQUEST OUTPUT
57
TB3
TEST TERMINAL
8
CKSTP
CLOCK PARTIAL STOP INPUT
58
TB4
TEST TERMINAL
9
RST
RESET TERMINAL
59
TB5
TEST TERMINAL
10
VDD
POWER SOURCE TERMINAL
60
TB6
TEST TERMINAL
11
HD7
HOST DATA INPUT
61
TB7
TEST TERMINAL
12
HD8
HOST DATA INPUT
62
TB8
TEST TERMINAL
13
HD6
HOST DATA INPUT
63
VPB
GROUND TERMINAL (DRAM AREA)
14
HD9
HOST DATA INPUT
64
TB9
TEST TERMINAL
15
VSS
GROUND TERMINAL
65
TB10
TEST TERMINAL
16
HD5
HOST DATA INPUT
66
TB11
TEST TERMINAL
17
HD10
HOST DATA INPUT
67
TB12
TEST TERMINAL
18
HD4
HOST DATA INPUT
68
TB13
TEST TERMINAL
19
HD11
HOST DATA INPUT
69
TB14
TEST TERMINAL
20
VSS
GROUND TERMINAL
70
TEST2
TEST TERMINAL
21
HD3
HOST DATA INPUT
71
TEST3
TEST TERMINAL
22
HD12
HOST DATA INPUT
72
VDD
POWER SOURCE TERMINAL
23
HD2
HOST DATA INPUT
73
VSS
GROUND TERMINAL
24
HD13
HOST DATA INPUT
74
ALRCK
LRCK OUTPUT FOR DAC ON FAST PLAY
25
VSS
GROUND TERMINAL
75
ACK
BASE CLOCK INPUT ON FAST PLAY
26
HD1
HOST DATA INPUT
76
SBSY
SUBCODE BLOCK SYNC OUTPUT
27
HD14
HOST DATA INPUT
77
SFSY
SUBCODE DATA SYNC FRAME INPUT
28
HD0
HOST DATA INPUT
78
SBDI
SUBCODE DATA INPUT
29
HD15
HOST DATA INPUT
79
CLCK
SUBCODE DATA CLOCK OUTPUT
30
VSS
GROUND TERMINAL
80
SBOK
SUBCODE Q DATA FLAG INPUT
31
HDRQ
DATA REQUEST TERMINAL
81
C2PI
DATA CORRECTION FLAG INPUT
32
HWR
HOST WRITE SIGNAL INPUT
82
LRCK
CHANNEL CLOCK INPUT
33
HRD
HOST READ SIGNAL INPUT
83
DAI
DATA SIGNAL INPUT
34
IORDY
IO TRANSFER READY OUTPUT
84
BCKI
BIT CLOCK INPUT
35
VSS
GROUND TERMINAL
85
VSS
GROUND TERMINAL
36
CSEL
CABLE SELECT INPUT
86
XI
MASTER CLOCK I/O
37
HDAK
DATA ACKNOWLEDGE INPUT
87
XO
MASTER CLOCK I/O
38
INTRQ
INTERRUPT SIGNAL OUTPUT
88
VDD
POWER SOURCE TERMINAL
39
IOCS16
DATA BIT WIDE SELECT OUTPUT
89
MD0
MICOM DATA I/O
40
VSS
GROUND TERMINAL
90
MD1
MICOM DATA I/O
41
HA1
HOST ADDRESS 1 INPUT
91
MD2
MICOM DATA I/O
42
PDIAG
POST DIAGNOSTIC I/O
92
MD3
MICOM DATA I/O
43
HA0
HOST ADDRESS 0 INPUT
93
MD4
MICOM DATA I/O
44
HA2
HOST ADDRESS 2 INPUT
94
MD5
MICOM DATA I/O
45
HCS1
CHIP SELECT 1 INPUT
95
MD6
MICOM DATA I/O
46
HCS3
CHIP SELECT 3 INPUT
96
MD7
MICOM DATA I/O
47
VSS
GROUND TERMINAL
97
VSS
GROUND TERMINAL
48
DASP
DRIVE ACTIVE OUTPUT
98
MA0
MICOM ADDRESS INPUT
49
ADA
DATA OUTPUT FOR DAC ON FAST PLAY
99
MA1
MICOM ADDRESS INPUT
50
ABCK
BCK OUTPUT FOR DAC ON FAST PLAY
100
MA2
MICOM ADDRESS INPUT
PIN DESCRIPTIONS
Summary of Contents for SCR-3232
Page 2: ... Samsung Electronics Co Ltd JULY 1998 Printed in Korea Electronics ...
Page 7: ...n Operational Position Diagram 7 ...
Page 8: ...8 ...
Page 9: ...9 n Operational Position Diagram ...
Page 10: ...10 ...
Page 36: ......