Samsung S5PC110, Manual

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S5PC110_UM 3 CLOCK CONTROLLER
3-12
3.6 SPECIAL CLOCK DESCRIPTION
3.6.1 SPECIAL CLOCK TABLE
Table 3-6 Special Clocks in S5PC110
Name Description Range Source
SCLK_ONENAND ONE NAND operating
clock ~166 MHz
(SCLK_ONENAND) (A, M)PLL
SCLK_G3D G3D core operating
clock
~200 MHz (A, M, E, V)PLL
SCLK_MFC MFC core operating
clock ~200 MHz (A, M, E, V)PLL
SCLK_CAM0,1 Reference clock for
external CAM device CAM spec All possible clock sources
SCLK_FIMD FIMD operating clock All possible clock sources
SCLK_TVENC TVENC/ DAC clock 54 MHz VPLL, HDMI PHY output
SCLK_DAC DAC clock 54 MHz VPLL, HDMI PHY output
SCLK_MIXER MIXER clock VPLL, HDMI PHY output
SCLK_HDMI HDMI LINK clock All possible clock sources
SCLK_PIXEL HDMI PIXEL clock All possible clock sources
SCLK_SPDIF SPDIF operating clock SCLK_AUDIO0~2
SCLK_MMC0,1,2 HSMMC operating
clock
All possible clock sources
SCLK_USB_OHCI USB OTG clock 48MHz USB PHY
SCLK_USB_PHY USB OTG clock 30MHz USB PHY
SCLK_AUDIO0,1,2 AUDIO operating clock
(PCM, I2S)
All possible clock sources
SCLK_PWI IEM APC operating
clock All possible clock sources
SCLK_SRCLK KEY I/F or TSADC filter
clock XXTI, XUSBXTI
SCLK_SPI0,1,2 SPI operating clock All possible clock sources
SCLK_UART0,1,2,3 UART operating clock All possible clock sources
All possible clock sources include XXTI, XUSBXTI, SCLK_HDMI27M, SCLK_USBPHY, SCLK_HDMIPHY,
SCLKMPLL, SCLKEPLL, and SCLKVPLL.
XXTI and XUSBXTI mean external crystal and USB 48 MHz crystal, respectively.
APLL and MPLL mean output clock of APLL and MPLL, respectively.