Samsung S5PC110, Manual

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S5PC110_UM 8 KEYPAD INTERFACE
8-4
8.3 FILTER CLOCK
KEYPAD interface debouncing filter clock (FCLK) is divided from FLT_CLK, that is OSC_IN. User can set
compare value for 10-bit up-counter (KEYIFFC). When filter enable bit(FC_EN) is HIGH, filter clock divider is ON.
The frequency of FCLK is frequency of FLT_CLK / ((K 1) x 2). On the contrary, if FC_EN is Low, filter
clock divider does not divide FLT_CLK.
8.4 WAKEUP SOURCE
KEYPAD inputs using Port0 can be used as a wakeup source. When the Key input is used for wakeup source
from IDLE, STOP or SLEEP mode, KEYPAD interface register setting is not required. GPIO register setting
(GPH2CON, GPH3CON) for KEYPAD interface and SYSCON register (PWR_CFG) for masking are required for
wakeup. Therefore, to use 14x8 KEYIF which can be used by wakeup source, you must input mix rows of port0
and port1. For example, port0 for ROW[0:7], port1 for ROW[8:13]. In this case, the only keys using port0 can be
wakeup source.