S5PC110_UM
2 1BCAMERA INTERFACE
2-33
CIGCTRLn
Bit
Description
Initial State
0 = Enables (update is possible)
(ML=XX)
Reserved [11:9]
-
0
CAM_JPEG
[8]
Specifies the camera input in 8-bit JPEG format. If the image
format is selected as JPEG format, the image format conversion
is not possible. It should be set as scaler bypass mode and
ITU601 8-bit mode.
1 = JPEG format
0 = Non-JPEG format
(ML=XX)
0
Reserved
[7]
Should be ‘1’.
1
SelWB_CAMIF
[6]
Specifies the WriteBack input select signal.
1 = WriteBack input select (YCbCr4:4:4 only)
0 = Camera input select
(ML=XX)
0
CSC_601_709 [5]
Selects
ColorSpaceConversion
equation.
1 = ITU709 equation select (HD size target method)
0 = ITU601 equation select (SD size target method)
(ML=XO)
0
InvPolHSYNC
[4]
1 = Inverses the polarity of HSYNC (this bit is useful only when
delay count interlace mode and FIELD port is connected to
HSYNC)
0 = Normal
(ML=XX)
0
SelCam_CAMIF
[3]
Selects the External camera.
1 = Selects MIPI Camera
0 = Selects ITU Camera
(ML=XX)
0
FIELDMODE
[2]
Specifies the ITU601 interlace field mode (Do not care this bit in
ITU656 mode).
1 = Uses the FIELD port mode (FIELD port = FIELD signal)
0 = Uses the Edge delay count mode (FIELD port = HSYNC
signal)
Note: Check the FIELD port connection.
(ML=XX)
0
InvPolFIELD
[1]
1 = Inverses the polarity of FIELD
0 = Normal
(ML=XX)
0
Cam_Interlace
[0]
Specifies the External Camera scan method.
1 = Interlace
0 = Progressive
If this mode is enable, control signals cannot change under
operation except ImgCptEn,ImgCptEnSC and ScalerStart
(ML=XX)
0
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...