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ROUTE FROM EACH CAP
IN SAME LAYER
ROUTE FROM C243
T7 CONNECT TO
ISOLATE EACH GND
0.3T
0.3T
CLOSE TO THE PIN
ROUTE FROM C236(0.1T)
0.3T
ISOLATE
G
DIRTY GND : E12,F12,G12 (TO C207,C224,C225,C241)
BOTH HOLE (1.5PI)
CLEAN GND : C15,F14,F15,F13 (TO C204,C205,C208,C209,C221)
CLOSE TO THE PIN(0.3T)
B
ONLY C219,C238
ISOLATE VBAT(0.3T)
H
DON’T CONNECT H10 & J10
JTAG
NOISY
USE AS GPO
L
0
3
BB / MEMORY / JTAG
0.15T
F
CLOSE TO THE PIN
CLOSE TO XO(SHIELD & CUT FILL)
0.15T
SHORT TRACE
ISOLATE EACH PATH
256M NOR + 128M PSRAM
CLOSE TO THE PIN
MEMORY
VCAM_1.8V
TP_AD_TWO
R201
TP_WEn
VBAT
VDD_1.8V
R509
C227
R206
R204
C208
C233
6 D-
GND
3
HP|PWR
5
9 ID
RXD
7
8 TXD
VBATT
1
2 V_BUS
VDD_TDC_1.3V
JTAG200
10 ANT
4 D+
C232
K14
DU
G9
A|DQ10
H11
F-DPD
H12
DU
H3
DU
H4
VCC
H7
P-CE#
H8
P-CRE
K1
DU
G11
A|DQ1
G12
A|DQ0
G3
A|DQ15
G4
A|DQ14
G5
VSSQ
G6
A|DQ5
G7
A|DQ4
G8
A|DQ11
F3
VSS
F4
A|DQ7
F5
A|DQ6
F6
A|DQ13
F7
A|DQ12
F8
A|DQ3
F9
A|DQ2
G10
VCCQ
E5
A20
E6
ADV#
E7
A23
E8
F-RST#
E9
F-WP#|P-CE2#
F10
A|DQ9
F11
A|DQ8
F12
OE#
D7
VCC
D8
WE#
D9
F-VPP
E10
A18
E11
F-CE#
E12
VSS
E3
VCCQ
E4
A16
C8
P-UB#
D10
A19
D11
A17
D12
A22
D3
WAIT
D4
A21
D5
VSS
D6
CLK
2
NC
A1
DU
A14
DU
C11
A24
C12
DU
C3
DU
C4
F-CE2#|A25
C7
P-LB#
U200
1
NC
C221
VDD_EBU_1.8V
R208
C219
C210
C228
VDD_IO2_1.8V
VDD_IO1_1.8V
VDD_IO2_1.8V
C231
C237
C226
C212
C218
VDD_1.8V
R207
TP_CS_Flash_ROM
G203
C203
4
4
5
5
6 6
7 7
8 8
9 9
CN200
1 1
10
10
2
2
3 3
C234
VMMC_2.85V
VDD_1.8V
C215
R215
G200
VDD_IO1_1.8V
TP_ADVn
VDD_IO1_1.8V
VDD_NEG_1.3V
VUSB_3.1V
G202
VDD_1.8V
VDD_NEG_1.3V
C201
R217
C209
VRTC_2.3V
C207
C214
VDD_1.8V
VDD_EBU_1.8V
C220
VDD_RF2_2.5V
TP_AD_ZERO
VDD_RF2_2.5V
C200
C211
VSIM_2.85V
R214
C202
TH200
VDD_IO2_1.8V
C235
VDD_IO1_1.8V
C206
OSC200
C213
C225
C224
TP_MEM_CLK
VDD_2.9V
VDD_TRX_1.4V
VDD_EBU_1.8V
VBAT
TP_RDn
R209
C229
C217
C204
TP_CS_RAM
TP_WAITn
R210
C236
VBAT
VDD_1.8V
R216
C216
C230
C223
R205
VDD_TRX_1.4V
V_EARMIC
G201
VDD_IO1_1.8V
TP_VDDFS
C222
L201
4
2
1
3
VUSB_3.1V
OSC201
V_MIC_2.2V
T3
A23
T4
VDDCHG
T5
VCHG
T6
SD1_FB
T7
VSS_SD1
T8
VIB
T9
VSS_PMU
T10
VREF
T11
M1
T12
MICP1
T13
MICP2
T14
HSR
T15
CP1
T16
NC2
T2
BFCLK0
R3
ADV_N
R4
WR_N
R5
VDD_EBU
R6
CSB
R7
SD1SW
R8
VSS_VIB
R9
ONOFF
T1
NC4
R10
ACD
R11
M2
R12
MICN1
R13
MICN2
R14
HSL
R15
CP2
R16
VDDNEG
R2
A21
P2
A|D7
P3
A|D15
P4
A20
P5
A|D13
P7
VDD_SD1
P8
VAUX
P9
ANAMON
R1
A16
P1
A|D14
P10
VPMU
P11
AGND
P12
VMIC
P13
VUMIC
P14
VDD1V8CP
P15
VSSLSR
P16
VBATSP
N11
VDD_FMR
N12
M0
N15
LSP
N16
LSN
N2
A|D12
N3
A|D4
N4
A24
N8
VBAT_PMU
M16
EPP
M2
A|D5
M3
CS1_N
M6
SENSEP
M7
CS
M8
VSIM
M9
VUSB
N1
A|D6
L6
SENSEN
L7
VMMC
L8
LEDFBN
L9
LEDDRV
M1
A|D3
M10
FMRIN
M11
FMRINX
M15
EPN
L10
VRTC
L13
RESET_N
L14
VSSMS
L15
OSC32K
L16
F32K
L2
A|D10
L3
A|D11
L4
A|D9
K2
A|D1
K3
A|D0
K4
CS0_N
K5
MMCI_DAT3
K6
VSHNT
K7
VDDIO2
K8
VCORE
L1
A|D2
J8
USIF2_CTS_N
J9
VSSCORE3
K1
A|D8
K10
LEDFBP
K11
DPLUS
K12
DMINUS
K15
FSYS_EN
K16
TRIG_IN
J13
MON1
J15
TDO
J16
TDI
J2
A18
J3
A22
J4
A17
J6
WAIT_N
J7
USIF2_RXD_MRST
H6
MMCI_DAT1
H7
USIF2_RTS_N
H8
USIF2_TXD_MTSR
H9
VSSCORE2
J1
RD_N
J10
VDD1V81
J11
DIGUP_CLK
J12
MON2
H11
DIGUP1
H12
SWIF_TXRX
H13
VDDMS
H15
TRST_N
H16
TCK
H2
MMCI_CLK
H3
MMCI_DAT0
H4
A19
G4
CC_RST
G5
MMCI_DAT2
G6
CIF_PCLK
G7
CIF_PD
G8
VDDCORE
G9
VDDIO1
H1
MMCI_CMD
H10
VRF1
G10
DIGUP2
G11
FSYS1
G12
VSSDIG
G13
VDDRF2
G14
VBAT
G16
TMS
G2
CC_CLK
G3
CC_IO
F2
DIF_D2
F3
DIF_D7
F4
DIF_CS1
F6
CLKOUT2
F7
CIF_HSYNC
F8
VSSCORE1
F9
VDDFS
G1
DIF_VD
F1
DIF_HD
F10
KP_OUT5
F11
FSYS2
F12
VSSXO
F13
VSSRX
F14
VSSTRX
F15
VSSLO
F16
RX34
E12
VSSDCO
E16
RX34X
E2
DIF_D8
E3
DIF_CD
E6
CIF_RESET
E7
CIF_VSYNC
E8
CIF_D7
E9
KP_OUT3
D2
DIF_RESET
D3
DIF_D3
D4
DIF_RD
D8
I2S1_CLK0
D9
KP_OUT0
E1
DIF_D0
E10
KP_IN5
E11
VDDXO
C5
CIF_D2
C6
CIF_D5
C7
CIF_D6
C8
I2S1_WA0
C9
KP_OUT2
D1
DIF_D1
D10
KP_IN4
D16
RX12
C12
PAEN
C13
PABIAS
C14
VDET
C15
VSSRF
C16
RX12X
C2
DIF_D4
C3
DIF_WR
C4
MON3
B4
T2IN
B5
I2C_SCL
B6
CIF_D1
B7
CIF_D4
B8
I2S1_TX
B9
KP_OUT1
C1
DIF_D5
C10
KP_IN3
B11
XOX
B12
VDDTDC
B13
PABS
B14
VDDTRX
B15
TX2
B16
FE1
B2
USIF1_CTS_N
B3
USIF1_RXD_MRST
A4
CLKOUT0
A5
I2C_SDA
A6
CIF_D0
A7
CIF_D3
A8
I2S1_RX
A9
KP_IN0
B1
DIF_D6
B10
KP_IN2
A11
XO
A12
VDDMMD
A13
VRAMP
A14
FE2
A15
TX1
A16
NC1
A2
USIF1_TXD_MTSR
A3
USIF1_RTS_N
PMB8808
UCP200
1
NC
2
NC
A1
NC3
A10
KP_IN1
VDD_EBU_1.8V
L200
VDD_TDC_1.3V
C205
ONKEY
EAR_SPK_R
VDDCHG
VCHG
MOT_EN
KEY_ROW(2)
CS
SPK_P
SPK_N
SEND_END_DIRECT
EAR_SPK_L
ADVn
WEn
CSB
CS0n_Flash_ROM
VSHNT
RST_BB
SENSE_N
EN_MAIN_KEY
RCV_N
RCV_P
CS1n_RAM
SENSE_P
FM_LNA_SW
TRSTn
EN_EAR_AMP
UART2_TXD
RDn
EAR_SW
WAITn
UART2_RXD
EN_CAM_PWR
USB_DP
USB_DM
BT_REQ_CLK
LB_RX_N
LB_RX_P
HB_RX_N
HB_RX_P
SD_DETECT
CLK26M_BT
SIM_CLK
SIM_IO
SIM_RST
EN_LCD_BL
CS1n_RAM
RAMP
BS2
LB_TX
UART1_TXD
VF
VLOGIC
HB_TX
BS1
UART1_RXD
3.5_DETECT
TX_EN
CAM_MCLK_OUT
WAITn
MEM_CLK
WEn
CS0n_Flash_ROM
ADVn
RST_BB
RDn
RXD1_J
TXD1_J
JIG_ON_J
VBUS_5V_J
USB_DP_J
USB_DM_J
RXD1_J
TXD1_J
MEM_CLK
A(23)
KEY_COL(0)
KEY_ROW(1)
KEY_ROW(4)
KEY_ROW(0)
KEY_COL(4)
KEY_COL(3)
KEY_COL(2)
A(24)
TMS
TDI
TCK
RST_BB_J
TRSTn
TDO
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
AD(8)
AD(9)
AD(10)
AD(11)
AD(12)
AD(13)
AD(14)
AD(15)
SLIDE_UPDOWN
LCD_RD
RST_BB_J
KEY_COL(0:5)
KEY_COL(1)
KEY_ROW(0:4)
KEY_ROW(3)
AD(0:15)
AD(0)
AD(1)
AD(2)
BT_RST
FLM
LCD_RS
TCK
TMS
TDI
FM_LNA_OUT
AD(0:15)
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
AD(8)
AD(9)
AD(10)
AD(11)
AD(12)
AD(13)
AD(14)
AD(15)
A(23:24)
A(23)
A(24)
AUX_MIC_N
MIC_MAIN_P
AUX_MIC_P
SD_DATA(0)
SD_DATA(1)
SD_DATA(2)
SD_DATA(3)
SD_CLK
SD_CMD
CAM_SCL
PCM_TXD
TDO
CAM_RST
CAM_VSYNC
LCD(0:7)
LCD(0)
LCD(1)
LCD(2)
LCD(3)
LCD(4)
LCD(5)
LCD(6)
LCD(7)
LCD_WR
LCD_CS
LCD_RST
MIC_MAIN_N
CAM_SDA
PCM_RXD
PCM_SYNC
PCM_CLK
CAM_HSYNC
CAM_D(0:7)
CAM_D(0)
CAM_D(1)
CAM_D(2)
CAM_D(3)
CAM_D(4)
CAM_D(5)
CAM_D(6)
CAM_D(7)
CAM_PCLK_IN
GSM RX
PCS/DCS RX
SPK P/N
EAR_L/R
RCV P/N
CLK
GSM TX
PCS /DCS TX
V_BAT
GT-E2330B
GT-E2330
SAMSUNG PROPRIETARY
THIS DOCUMENT CONTAINS CONFIDENTIAL
PROPRIETARY INFORMATION THAT IS
SAMSUNG ELECTRONICS COS PROPERTY.
DO NOT DISCROSE TO OR DUPLICATE FOR OTHERS
EXCEPT AS AUTHORIZED BY SAMSUNG.