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Flow Chart of Troubleshooting
9-4
B
A
T
2
0
0
C
10
5
C
10
8
C1
12
C
11
3
C
11
5
C
11
7
C1
18
C
11
9
C12
0
C
12
4
C
12
5
C
12
6
C
12
7
C
12
8
C
12
9
C1
30
C1
31
C1
39
C1
40
C
14
1
C1
42
C14
3
C1
44
C14
5
C14
6
C1
47
C1
48
C1
51
C
20
0
C
20
1
C
20
2
C2
03
C2
04
C
20
5
C2
06
C20
7
C
20
8
C2
09
C2
10
C21
1
C
21
2
C
21
3
C
21
4
C
21
5
C
21
6
C
21
7
C
21
8
C
22
2
C
22
3
C
22
4
C
22
8
C
23
1
C
30
0
C
30
1
C30
2
C
30
3
C
30
4
C
30
7
C3
11
C3
12
C3
18
C3
20
C3
21
C3
22
C3
23
C3
26
C3
27
C32
8
C33
0
CN
201
D
20
1
D30
5
F101
F
1
0
2
L10
1
L10
8
L10
9
L11
0
L1
11
L2
00
L
20
2
OSC200
OS
C2
01
PA
M1
00
R1
03
R
10
4
R
10
5
R
10
6
R
10
7
R
10
8
R1
11
R1
12
R12
5
R
12
6
R
20
0
R
20
1
R
20
3
R
2
0
4
R
20
5
R
20
6
R2
07
R
21
0
R
30
0
R
30
5
R3
10
R3
11
R
31
2
R3
13
R
F
S
10
0
SC100
2
0
1
C
S
1
0
1
C
S
S
C
10
3
SC
10
5
S
C
10
6
TH
200
T
P
10
1
T
P
10
2
T
P
10
3
T
P
10
4
T
P
10
5
T
P
10
6
T
P
10
7
T
P
10
8
T
P
10
9
T
P
11
0
T
P
11
1
T
P
20
0
TP
201
TP202
TP203
T
P
20
4
T
P
20
5
T
P
20
6
TP207
U10
1
U104
U
1
05
U302
U
C
P
20
0
UM
E20
0
W7
LDO_EN
V9
ACC_DET_IN
W10
GATE_SW
W11
SWCORE
V6
THERM_IN
V11
SWCORE
V16
VCM_OUT
V17
VCM_OUT
U1
SSI_DATA
U2
SSI_OUT
V10
VCHG
T2
SSI_SEL2
T4
NRESET
T1
SSI_CLK
R2
TMS
R4
TEST
R7
CLK_BT
R1
SSI_SEL0
R10
GATE_REG
R
11
G
N
D
_V
C
O
R
E
P1
TDO
P16
VBG
P2
TCK
P4
RTCK
N18
CLK_XOUT
N4
TDI
N
7
G
N
D
_V
C
O
R
E
N
8
G
N
D
_V
C
O
R
E
N
9
G
N
D
_V
C
O
R
E
N
10
G
N
D
_V
C
O
R
E
N
11
G
N
D
_V
C
O
R
E
N
12
G
N
D
_V
C
O
R
E
N
13
G
N
D
_V
C
O
R
E
M16
PA_RAMP
M4
NTRST
M
5
G
N
D
_V
C
O
R
E
L16
CLK_32K_OUT
L5
G
N
D
_V
C
O
R
E
J7
G
N
D
_V
C
O
R
E
J8
G
N
D
_V
C
O
R
E
J9
G
N
D
_V
C
O
R
E
J1
2
G
N
D
_V
C
O
R
E
J1
3
G
N
D
_V
C
O
R
E
J2
SSI_SEL1
H
7
G
N
D
_V
C
O
R
E
H
8
G
N
D
_V
C
O
R
E
H
9
G
N
D
_V
C
O
R
E
J1
0
G
N
D
_V
C
O
R
E
J1
1
G
N
D
_V
C
O
R
E
H
11
G
N
D
_V
C
O
R
E
H
12
G
N
D
_V
C
O
R
E
SIM_DATA
G
N
D
_V
C
O
R
E
H
10
G
N
D
_V
C
O
R
E
G
10
G
N
D
_V
C
O
R
E
G
13
G
N
D
_V
S
IM
G16
SIM_RST
E13
NOE
D12
NRESET_OUT
B11
NWE0
1
N
C
2
N
C
UCP200
TP202
L202
VGPIO_2.8V
R
20
5
VBG
R203
BATT_GND
SPI_CLK
SPI_DO
SPI_CS
SPI_INT
BT_RST
BT_CLK
SPI_DI
CHG_REG
VCHG_P
AUX_DET
32KHz_DIGIT
VF
SYSRST
RSTON
VCM_OUT
OEn
WEn
RTCK
TMS
TCK
TDO
TRST_N
TDI
SIM_DATA
SIM_RST
VCORE_1.25V
RAMP
CHG_SW
TCK 6
TDI 5
7
TDO
2
TMS
4
TRST_N
V_JTAG 1
CN201
9
GND
PON_RESET_N 8
RTCK 3
TCK
TDO
TRST_N
VGPIO_2.8V
RSTON
RTCK
TDI
TMS
C217
C218
R201
TP200
C216
TP206
C231
C213
TP204
C228
F1
NC
F10
NC
F2
VCCRC
F5
CSC#
F6
CREC
F9
NC
E8
VCCQRC
C5
NC
C6
RSTR#
C7
WPR#
C9
CER#
D10
OERC#
B7
VPPR
C1
VCCQRC
C4
ADVRC#
A9
NC
B1
F-RDY|R-WAIT
B4
CLKRC
B5
VCCRC
B6
WERC#
1
NC
2
NC
A1
NC
A10
NC
A2
NC
A5
LBC#
A6
UBC#
UME200
C214
TP203
TP205
C215
A(14)
OEn
NCSFLASH
SYSRST
A(15)
WEn
A(13)
LB
UB
NCSRAM