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SAMSUNG Proprietary-Contents may change without notice
Level 3 Repair
8-37
This Document can not be used without Samsung's authorization
3.7" LCD Connector
Buffer was added to tune the SONY LCD timing.
LCD EMI_FILTER
R702
R734
R729
R735
TP_LCD_HSYNC
4
5
OUT1
OUT2
6
7
OUT3
8
OUT4
9
GND
10
GND
1 IN1
IN2
2
3 IN3
IN4
1
2 IN2
IN3
3
4 IN4
OUT1
5
6
OUT2
OUT3
7
OUT4
8
F707
F702
GND
9
GND
10
IN1
VREG_LCD_3.0V
C712
TP_LCD_EN
R703
C731
C713
TP_LCD_SCL
R704
CATHODE
C709
ANODE_24V
3 IN3
IN4
4
5
OUT1
OUT2
6
7
OUT3
OUT4
8
F703
9
GND
GND
10
1 IN1
IN2
2
TSP_AVDD_2.8V
TP_LCD_VSYNC
TP_LCD_D(0)
IN3
IN4
4
5
OUT1
OUT2
6
7
OUT3
8
OUT4
F708
9
GND
10
GND
1 IN1
IN2
2
3
5
5
5
5
5
6
5
6
5
7
5
7
5
8
5
8
6
6
7
7
8
8
9
9
48 48
49 49
5
5
50 50
51 51
52 52
53 53
54 54
40
40
41 41
42
42
43 43
44 44
45 45
46 46
47 47
33
33
34
34
35 35
36
36
37
37
38
38
39
39
4
4
26 26
27 27
28
28
29 29
3
3
30
30
31
31
32
32
19
19
2
2
20
20
21
21
22
22
23
23
24
24
25 25
11
11
12
12
13 13
14
14
15
15
16
16
17
17
18
18
HDC701
1
1
10
10
C710
C714
TP_LCD_SDI
2
GND
3
NC
5
1 NC
VCC 6
4
Y
U705
A
VREG_LCD_1.8V
R727
IN3
3
4 IN4
OUT1
5
6
OUT2
7
OUT3
8
OUT4
F700
GND
9
10
GND
1 IN1
IN2
2
C711
R728
VREG_LCD_1.8V
2 IN2
IN3
3
4 IN4
OUT1
5
6
OUT2
OUT3
7
OUT4
8
F701
GND
9
GND
10
1 IN1
TSP_AVDD_2.8V
LCD_D(16)
LCD_D(2)_F
LCD_D(4)_F
LCD_D(0)_F
LCD_D(2)
LCD_D(4)
LCD_D(0)
LCD_PCLK
LCD_D(12)
LCD_D(10)
LCD_D(8)
LCD_D(20)_F
LCD_D(20)
LCD_D(22)_F
LCD_D(22)
LCD_D(6)_F
LCD_D(6)
LCD_D(18)_F
LCD_D(16)_F
LCD_D(18)
LCD_D(14)_F
LCD_D(12)_F
LCD_D(10)_F
LCD_D(8)_F
LCD_D(14)
LCD_nCS
LCD_EN
LCD_SCL
LCD_HSYNC
LCD_D(23)_F
LCD_D(23)
LCD_D(17)_F
LCD_D(17)
LCD_D(19)_F
LCD_D(19)
LCD_D(21)_F
LCD_D(21)
LCD_D(4)_F
LCD_D(9)_F
LCD_D(2)_F
LCD_D(7)_F
LCD_D(0)_F
LCD_VGH
LCD_D(5)_F
LCD_D(3)_F
LCD_D(1)_F
MLCD_RST
LCD_VSYNC
LCD_SDI
LCD_D(19)_F
LCD_D(12)_F
LCD_D(17)_F
LCD_D(10)_F
LCD_D(15)_F
TSP_SCL_1.8V
LCD_D(8)_F
TSP_SDA_1.8V
LCD_D(13)_F
LCD_D(6)_F
LCD_D(11)_F
TSP_INT_1.8V
LCD_D(22)_F
LCD_D(20)_F
LCD_D(18)_F
LCD_D(23)_F
LCD_D(16)_F
LCD_D(21)_F
LCD_D(14)_F
LCD_ID_1
LCD_ID_0
LCD_D(11)_F
LCD_D(9)
LCD_D(15)
LCD_D(11)
LCD_D(13)
LCD_D(7)_F
LCD_D(3)_F
LCD_D(7)
LCD_D(3)
LCD_D(1)_F
LCD_D(5)_F
LCD_D(5)
LCD_D(1)
LCD_D(9)_F
LCD_D(15)_F
LCD_D(13)_F
300 mA (MAX)
Default ON
[ 2.950 ~ 3.600 V ]
[ 1.500 ~ 3.300 V ]
150 mA (MAX)
50 mA (MAX)
Default ON
Default ON_Not Used
[ 1.000 ~ 1.400 V ]
LDO5
LDO9
300 mA (MAX)
[ 2.750 ~ 3.300 V ]
LDO21
[ 1.500 ~ 3.300 V ]
[ 1.500 ~ 3.300 V ]
[ 1.500 ~ 3.300 V ]
300 mA (MAX)
Changed the GPIO for RAM dump
LDO14
LDO8
150 mA (MAX)
300 mA (MAX)
[ 1.000 ~ 1.400 V ]
Charger Input
150 mA (MAX)
300 mA (MAX)
150 mA (MAX)
[ 2.750 ~ 3.300 V ]
LDO17
150 mA (MAX)
50 mA (MAX)
[ 1.700 ~ 3.300 V ]
150 mA (MAX)
Default ON
50 mA (MAX)
300 mA (MAX)
300 mA (MAX)
150 mA (MAX)
LDO3
[ 1.100 ~ 1.300 V ]
150 mA (MAX)
LDO18
LDO10
[ 1.500 ~ 3.300 V ]
Default ON
300 mA (MAX)
LDO7
RC FILTER
LDO19
[ 1.500 ~ 3.300 V ]
LDO15
[ 1.500 ~ 3.300 V ]
150 mA (MAX)
Default ON
[ 1.500 ~ 3.300 V ]
300 mA (MAX)
LDO6
150 mA (MAX)
150 mA (MAX)
[ 1.500 ~ 3.300 V ]
[ 1.500 ~ 3.300 V ]
LDO24
[ 2.500 ~ 3.300 V ]
[ 1.000 ~ 1.400 V ]
[ 1.000 ~ 1.400 V ]
[ 1.500 ~ 3.300 V ]
300 mA (MAX)
[ 1.500 ~ 3.300 V ]
300 mA (MAX)
[ 0.750 ~ 1.525 V ]
LDO16
300 mA (MAX)
[ 1.700 ~ 3.300 V ]
[ 1.500 ~ 3.300 V ]
Default ON
[ 1.000 ~ 1.400 V ]
C569
R533
VREG_QTR_2.2V
VREG_MSMA_2.05V
L
5
0
1
TP_PMIC_LDO10
C542
C545
R507
VREG_1.8V
V_BAT
C531
C547
VREG_USIM_1.8V
L
5
0
2
C535
C537
R554
TP_SIM_MRST
VREG_ADC_2.2V
R513
C529
C536
VREG_KEYLED_3.3V
R548
VREG_MSMA_1.3V
VREG_USB_3.0V
C532
TP_KBC(0)
C546
AVDD_VGA_2.8V
VREG_FEM_2.6V
C543
C528
VREG_LCD_3.0V
R512
C541
VREG_USB_1.8V
T16
VREG_L10
T2
VSW_S1
T14
VREG_L23
VREG_L6
R3
KYPD_DRV2|GPIO_10
R4
B
A
T
_
F
E
T
_
N
R
7
V
B
A
T
R
8
VREG_S1
R13
VREG_L25
R16
KYPD_DRV9|GPIO_17
N7
KYPD_DRV7|GPIO_15
N8
VREG_L7
P2
VREG_S0
N15
VREG_L24
N16
KYPD_DRV12|GPIO_20
N2
KYPD_DRV4|GPIO_12
M6
KYPD_DRV6|GPIO_14
M7
EXT_SMPS_EN|GPIO_40
M8
KYPD_DRV8|GPIO_16
M9
VREG_L9
N1
KYPD_DRV11|GPIO_19
M10
KYPD_DRV10|GPIO_18
M11
VREG_L20
M15
KYPD_DRV5|GPIO_13
M2
VREG_L8
L1
UART_M_RX|UPL_OUT|GPIO_37
L12
VREG_L19
L15
VSW_S0
L16
KYPD_DRV1|GPIO_09
L2
KYPD_DRV3|GPIO_11
K2
KYPD_SNS8|GPIO_08
K4
KYPD_SNS6|GPIO_06
K5
SLEEP_CLK1|GPIO_38
J5
VREG_L15
K1
UPL_IN4|UART_M_TX|GPIO_36
K12
B
A
T
T
_
T
H
E
R
M
|M
P
P
_
0
7
J
1
2
B
A
T
T
_
ID
|M
P
P
_
0
8
J
1
3
KYPD_SNS4|GPIO_04
J2
MP3_CLK|SLEEP_CLK2|GPIO_39
J4
VSW_S3
H16
KYPD_SNS7|GPIO_07
H2
UART_RX2|UPL_IN2|GPIO_34
H4
UPL_IN3|UART_RX3|GPIO_35
H5
GPIO_32|EBOOT_RX
G5
VREG_L14
H1
VREG_L12
G1
VREG_S3
G15
GPIO_31|EBOOT_TX
G4
KYPD_SNS5|GPIO_05
F2
UIM_CLK|GPIO_30
F4
LPA_MODE|EBOOT_M_TX|UIM_M_CLK|GPIO_29
F5
VSW_S4
E16
KYPD_SNS3|GPIO_03
E2
UIM_RST|GPIO_28
E5
UART_TX3|KYPD_DRV15|GPIO_23
E6
KYPD_DRV16|LPG_DRV1|GPIO_24
E7
KYPD_DRV17|LPG_DRV2|GPIO_25
E8
GPIO_27|UIM_M_RST
E9
KYPD_DRV18|LPG_DRV3|GPIO_26
D9
VREG_L2
E1
UART_RX1|UPL_IN1|GPIO_33
E10
VREG_S4
D15
UART_TX2|KYPD_DRV14|GPIO_22
D2
VREG_L3
C1
VREG_L13
C16
VREG_L4
C2
VREG_L11
D1
UART_TX1|KYPD_DRV13|GPIO_21
B4
KYPD_SNS1|GPIO_01
B5
KYPD_SNS2|GPIO_02
B6
VREG_L22
A9
VREG_L5
B1
VREG_S2
B13
VREG_L16
A16
VREG_L18
A4
VREG_L17
A6
VREG_L0
A10
VREG_L1
A11
VREG_L21
A12
VSW_S2
A14
C538
C544
TP_SIM_MCLK
TP_KBC(2)
VREG_WCA_1.2V
R534
R510
VREG_LCD_1.8V
C512
R508
VDD_VGA_1.8V
C533
VDD_VIB_3.0V
VREG_MSMC2_1.1V
C519
C539
VREG_MPLL_1.1V
C540
VDD_VGA_IO_1.8V
C534
VREG_MSMC1_1.1V
R514
VREG_SD_2.85V
VREG1_2.8V
C520
VUSB_5V
VREG_MOVI_2.85V
C548
CHG_STAT
CHG_EN
nON_SW
BAT_FET_N
VF
MIC_BIAS_EN
LCD_DETECT
EARMIC_BIAS_EN
KBC(1)
KBR(2)
KBR(1)
SD_FET_PWR_CTL
DDR_EXT_SMPS_EN
MSM_TXD2_1.8V
MSM_RXD2_1.8V
TA_CURRENT_SEL
PROX_EN
SIM_RST
IF_RXD_3.0V
MSM_RXD_1.8V
SIM_MRST
SIM_CLK
SIM_MCLK
MSM_TXD_1.8V
IF_TXD_3.0V
PM8058
UCP 400