RTD Embedded Technologies, Inc.
|
www.rtd.com
29
FPGA35S6046/FPGA35S6101 User’s Manual
6.2.13
R_PORT2H_DIR
(R
EAD
/W
RITE
)
This is the direction register for port2 high, port2_[16]
…port2_[19]. Indicates the direction of each pin ‘0’ = input ‘1’ = output
6.2.14
R_DDR_RD_DATA
(R
EAD
)
Reads the data of the DDR2 SRAM at R_DDR_ADDR location
A read is performed by writing address to R_DDR_ADDR.
6.2.15
R_DDR_WR_DATA
(R
EAD
/W
RITE
)
Writes data in registry to location R_DDR_ADDR of the DDR2 SRAM
6.2.16
R_DDR_ADDR
(R
EAD
/W
RITE
)
Address pointer of the DDR2 SRAM.
