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ECAN1000 User’s Manual 21 BDM-610020026 rev B
8259 Programmable Interrupt Controller
The chip responsible for handling interrupt requests in a PC is the 8259
Interrupt Controller. To use interrupts you will need to know how to read
and set the 8259's internal interrupt mask register (IMR) and how to send
the end-of-interrupt (EOI) command to acknowledge the 8259 interrupt
controller.
Interrupt Mask Register (IMR)
Each bit in the interrupt mask register (IMR) contains the mask status of
the interrupt line. If a bit is set (equal to 1), then the corresponding IRQ is
masked, and it will not generate an interrupt. If a bit is cleared (equal to
0), then the corresponding IRQ is not masked, and it can then generate
an interrupt. The interrupt mask register is programmed through
port
21h .
End-of-Interrupt (EOI) Command
After an interrupt service routine is complete, the 8259 Interrupt Control-
ler must be acknowledged by writing
the value 20h to port 20h.
What exactly happens when an interrupt occurs?
Understanding the sequence of events when an interrupt is triggered is
necessary to correctly write interrupt handlers. When an interrupt request
line is driven high by a peripheral device (such as the ECAN1000HR), the
interrupt controller checks to see if interrupts are enabled for that IRQ. It
then checks to see if other interrupts are active or requested and deter-
mines which interrupt has priority. The interrupt controller then interrupts
the processor. The current code segment (CS), instruction pointer (IP),
and flags are pushed onto the system stack, and a new set if CS and IP
are loaded from the lowest 1024 bytes of memory.
This table is referred to as the interrupt vector table and each entry to this
table is called an interrupt vector. Once the new CS and IP are loaded
from the interrupt vector table, the processor starts to execute code from
the new Code Segment (CS) and from the new Instruction Pointer (IP).
When the interrupt routine is completed the old CS and IP is popped from
the system stack and the program execution continues from the point
where the interruption occurred.