rtd DM34216HR, User Manual, Page: 63 / 76

RTD Embedded Technologies, Inc.
| www.rtd.com
63 DM34216HR
User’s Manual
BDM-610010056 Rev A
B[7:4]: Status
o
0x08: Uninitialized – The status when in the “Uninitialized” mode and the converter requires initialization.
o
0x09: Initializing
o
0x00: Stopped – The status when in the “Reset” mode, or in the “Uninitialized” mode and the converter does not require
initialization.
o
0x01: Filling Pre-Trigger buffer
o
0x02: Waiting for start trigger
o
0x03: Sampling/Waiting for stop trigger
o
0x04: Filling Post-Stop buffer
o
0x05: Wait to re-arm – Waiting until local FIFO is empty so the pre-trigger buffer can be filled.
o
0x07: Done capturing
6.6.3 CLK_SRC (R
EAD
/W
RITE
)
Selects the source for the clock of this function block.
o
0x00: System clock/immediate
o
0x01: Never
o
0x02: CLK_BUS2
o
0x03: CLK_BUS3
o
0x04: CLK_BUS4
o
0x05: CLK_BUS5
o
0x06: CLK_BUS6
o
0x07: CLK_BUS7
o
0x08: Reserved
o
0x09: Reserved
o
0x0A: CLK_BUS2 Inverted
o
0x0B: CLK_BUS3 Inverted
o
0x0C: CLK_BUS4 Inverted
o
0x0D: CLK_BUS5 Inverted
o
0x0E: CLK_BUS6 Inverted
o
0x0F: CLK_BUS7 Inverted
6.6.4 START_TRIG (R
EAD
/W
RITE
)
Selects the start trigger from the clock bus. CLK_DIV will start counting after the start trigger.
Refer to CLK_SRC (Read/Write) section above, for list of valid values.
6.6.5 CLK_DIV (R
EAD
/W
RITE
)
Divider for the pacer clock. Pacer Clock Frequency = (Clk_Src_Frequency) / (1 + CLK_DIV). If synchronizing with the pacer clock from
another Function Block (by using one of the CLK_BUS signals), this is typically set to 0.
6.6.6 CLK_DIV_CNTR (R
EAD
O
NLY
)
The current value of the Clock Divide Counter. This counter starts at a value of CLK_DIV, and counts down. When it reaches zero, a sample
is taken. This is useful when using a slow sample clock.
6.6.7 SAMPLE_CNT (R
EAD
O
NLY
)
Total number of samples collected. This does not increment in while in the “Waiting For Start Trigger” state. It also conti nues counting after a
Re-Arm.
6.6.8 INT_ENA (M
ASKABLE
R
EAD
/W
RITE
)
Each bit corresponds to an interrupt source . A value of ‘1’ enables the source, and a value of ‘0’ disables it. See below for a description of the
sources.