Rohm BD868 0MUF-C Series, User Manual

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User ’ s Guide
© 2022 ROHM Co., Ltd.
No. 65UG013E Rev.001
July 2022
4.2. MCU interface
A CY8CKIT-059 plug-in board is included in the MB set. It connects via 3 connectors CN1, CN2 and CN3
(Figure 4
– under CY8CKIT-059 plug-in board) to the MB. Its purpose is to manage the communication
between the GUI, MB and DB.
4.3. DB Interface
The DB is plugged into three connectors (CN7, CN8 and CN9).
CN7 carries all power signals (VIN and VOx), CN8 contains all the PMIC signal lines, whereas CN9 is
only a fool proof connector to prevent an erroneous DB plug-in orientation.
4.4. Level shifters
The logic signals of the CY8CKIT-059 plug-in board and the MB could have different voltage levels. To
adapt the levels three level shifters are foreseen. Two of them, U4 and U6, take care of the I/O signals while
U3 handles I2C signals.
4.5. Reference Voltage for I/O signals and I
2
C signals
Different DBs could lead to different required reference levels for I/O signals (VGPIO) or I2C (VI2C). For
this reason, the jumper connectors J7 and J8 (Figure 4) set the voltage reference of VGPIO and VI2C to any
chosen output voltage VOx that is provided by the DB or by the local LDO 1.8V reference.
The default setting for both jumpers J7 and J8 is between pin #31 and #32, so the local LDO 1.8V is set
for both VGPIO and VI2O. For any additional information on the details of other pin lines, please refer to the
schematic in paragraph
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4.6. Outputs Acquisition Block
The MB input voltage (that is also the DB input voltage) and all outputs of the DB are sensed and
transferred to the CY8CKIT-059 plug-in board by a multiplexer followed by a buffer stage.
5. DB DESCRIPTON
The BD868x0-DB has been designed to provide an easy tool to test the functionality of new camera
PMICs BD868A0 and BD868B0.
The core design of the application is compact. However, the large board size and multiple test points
allow a quick and easy evaluation.
The BD868A0/B0 contains 3 buck regulators and 1 LDO output as well as an internal linear regulator.
The schematics and the layout are designed with some unmounted capacitors both at the input and at
the outputs. This provides more flexibility for the input- and output buffering.