Hardware Interfaces
R&S
®
SMC100A
331
Operating Manual 1411.4060.32 ─ 04
A Hardware Interfaces
This section covers hardware related topics, like pin assignment of the GPIB bus inter-
face.
The remote control interfaces are described in detailes in
All other interfaces are described in sections "Legend of Front Planel" and "Legend of
Rear Panel" in the Quick Start Guide.
For specifications refer to the data sheet.
A.1 GPIB Bus Interface
Pin assignment
Fig. 1-1: Pin assignment of GPIB bus interface
Bus lines
●
Data bus with 8 lines D0 to D7:
The transmission is bit-parallel and byte-serial in the ASCII/ISO code. D0 is the least
significant bit, D7 the most significant bit.
●
Control bus with five lines:
IFC
(Interface Clear): active LOW resets the interfaces of the instruments connected
to the default setting.
ATN
(Attention): active LOW signals the transmission of interface messages, inactive
HIGH signals the transmission of device messages.
GPIB Bus Interface
