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R&S SMU200A
Test Procedures
1007.9845.82
1.79
E-12
Bit Error Rate Tester (BER, Option R&S K80)
The Bit Error Rate Tester is a firmware option, realized in a FPGA. The functionality of this FPGA is
tested in chapte “” on page 1.68. Performing these tests successfully implements Option
R&S K80 to be functional. Further testing is unnecessary.
Hardware Signals (only R&S SMATE)
Signal OPC
Test equipment
- Spectrum analyser (Table 1-2, item 24)
-
Adapter R&S Z5 (AUX I/O to BNC) (table 5-1, Pos. 27);
BNC cable
Test setup
Plug adapter into DIG I/O interface
Apply connection from OPC A/B to external trigger input of the
spectrum analyser.
Test method
The function of the OPC Signal is tested by triggering the spectrum
analyzer.
Measurement
Setting on DUT:
-
Frequency:
100 MHz
Settings on spectrum analyzer:
- TRIGGER EXTERN
- External triggering by positive edge at 1.4 V.
Change DUT Frequncy to 1 GHz
Check trigger on analyzer.
Signal RF OFF
Test equipment
- Spectrum analyzer (Table 1-2, item 24)
-
Pulse generator (Table 1-1, item 17)
-
Adapter R&S Z5 (AUX I/O to BNC) (table 5-1, Pos. 27);
BNC cable
Test setup
Plug adapter into AUX I/O interface
To test the function, connect the spectrum analyzer to the RF output
socket of the DUT and the pulse generator to the RF OFF A/B socket
on the adapter Z5.
Measurement
Setting on DUT:
Level
menu:
DIG I/O RF OFF
Enable
On
Determine the output level of the DUT at various carrier frequencies
with a "high" and a "low" signal applied.
The difference between the output level with a "high" signal applied
and that with a "low" signal applied is the ON/OFF ratio.
Recommended test frequencies
1 GHz, 4 GHz
Recommended test level
P
max
The number of necessary measurement depends on the number of installed RF paths.
Summary of Contents for R&S SMU200A
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