Rohde & Schwarz FSV3000, User Manual

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Network operation and remote control
R&S
®
FSVA3000/ R&S
®
FSV3000
789 User Manual 1178.8520.02 ─ 08
Table 11-14: Meaning of the bits used in the STATus:QUEStionable:TIMe register
Bit No. Meaning
0 not used
1 Sweep time too low
This bit is set if the sweep time is too low.
2 to 14 Unused
15 This bit is always 0.
11.2.3 Reset values of the status reporting system
The following table contains the different commands and events causing the status
reporting system to be reset. None of the commands, except
*RST
and
SYSTem:PRESet
, influence the functional instrument settings. In particular,
DCL
does
not change the instrument settings.
Table 11-15: Resetting the status reporting system
Event Switching on supply
voltage
Power-On-Status-
Clear
DCL,
SDC
(Device
Clear,
Selected
Device
Clear)
*RST or
SYS-
Tem:PRE
Set STA-
Tus:PRE-
Set *CLS
Effect 0 1
Clear STB, ESR - yes - - - yes
Clear SRE, ESE - yes - - - -
Clear PPE - yes - - - -
Clear EVENt parts of the regis-
ters - yes - - - yes
Clear ENABle parts of all
OPERation and QUEStionable
registers;
Fill ENABle parts of all other
registers with "1".
- yes - - yes -
Fill PTRansition parts with "1";
Clear NTRansition parts
- yes - - yes -
Clear error queue yes yes - - - yes
Clear output buffer yes yes yes 1) 1) 1)
Clear command processing
and input buffer yes yes yes - - -
1) The first command in a command line that immediately follows a <PROGRAM MESSAGE TERMINA-
TOR> clears the output buffer.
Status reporting system