Protocol Settings
R&S
®
EX-IQ-BOX
156
User Manual 1409.5570.32 ─ 05
A second synthesizer generates a 10 MHz reference clock selectable at one of the
GPIO interface connectors. The status LED turns blue, if the clock output is available.
Remote command:
7.2.7.3
Timing Measurements
The graph in the GUI shows the relation between downlink and uplink frame timing for
the single-hop configuration.
Fig. 7-60: CPRI timing measurements > downlink <-> uplink frame timing
T12
= delay of downlink signal from the output point of REC (R1) to the input point of RE (R2)
T34
= delay of uplink signal from the output point of RE (R3) to the input point of REC (R4)
Toffset = frame offset between the input signal at R2 and the output signal at R3
T14
= frame timing difference between the output signal at R1 and the input signal at R4
While TOffset is the internal processing delay inside the RE, T12 and T34 are the prop-
agation delays over the physical media.
Depending on the CPRI mode, CPRI RE test or CPRI REC test, either T14 or TOffset is
calculated, while the other parameter can be input if the internal delay of the DUT is
known.
To calculate the cable delay R21, subtract T14 and TOffset and divide the result by 2.
R21 = (T14-TOffset) / 2
The following graph shows an overview of the different sources of delay.
Fig. 7-61: CPRI timing measurements > delays
CPRI
Summary of Contents for EX-IQ-BOX
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