Network and Remote Operation
R&S
®
ESW
389
User Manual 1177.6298.02 ─ 08
Bit No.
Meaning
2
LMARgin 3 FAIL
This bit is set if limit margin 3 is violated.
3
LMARgin 4 FAIL
This bit is set if limit margin 4 is violated.
4
LMARgin 5 FAIL
This bit is set if limit margin 5 is violated.
5
LMARgin 6 FAIL
This bit is set if limit margin 6 is violated.
6
LMARgin 7 FAIL
This bit is set if limit margin 7 is violated.
7
LMARgin 8 FAIL
This bit is set if limit margin 8 is violated.
8 to 14
Not used
15
This bit is always 0.
STATus:QUEStionable:POWer Register
The
STATus:QUEStionable:POWer
register contains information about possible
overload situations that may occur during operation of the R&S
ESW. A separate
power register exists for each active channel.
You can read out the register with
STATus:QUEStionable:POWer:CONDition?
or
STATus:QUEStionable:POWer[:EVENt]?
Table 14-17: Meaning of the bits used in the STATus:QUEStionable:POWer register
Bit No.
Meaning
0
OVERload
This bit is set if an overload occurs at the RF input, causing signal distortion but not yet causing
damage to the device.
The R&S
ESW displays the keyword "RF OVLD".
1
Unused
2
IF_OVerload
This bit is set if an overload occurs in the IF path.
The R&S
ESW displays the keyword "IF OVLD".
3
Input Overload
This bit is set if the signal level at the RF input connector exceeds the maximum.
The RF input is disconnected from the input mixer to protect the device. In order to re-enable
measurement, decrease the level at the RF input connector and reconnect the RF input to the
mixer input.
The R&S
ESW displays the keyword "INPUT OVLD".
(Available in the Spectrum application.)
Remote Control Basics
