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Remote Control
R&S
®
NRT2
95
User Manual 1178.5550.02 ─ 04
Output queue
Error/event queue
&
&
&
&
&
&
+
&
Status byte
Service request
to controller at
transition from 0 to 1
1
0
2
3
4
5
x
7
1
0
2
3
MAV
ESB
RQS/MSS
7
Service request enable
Operation status
Standard event status
Questionable status
1
2
3
4
Figure 11-1: Status registers overview
1 =
Chapter 11.2.3, "Status Byte (STB) and Service Request Enable Register (SRE)"
2 =
Chapter 11.2.5, "Questionable Status Register"
3 =
Chapter 11.2.6, "Standard Event Status and Enable Register (ESR, ESE)"
4 =
Chapter 11.2.7, "Operation Status Register"
The highest level is formed by the status byte register (STB) and the associated ser-
vice request enable (SRE) register.
The status byte register (STB) receives its information from:
●
Standard event status register (ESR)
●
Associated standard event status enable register (ESE)
●
SCPI-defined operation status register
●
Questionable status register, which contains detailed information on the device.
●
Device status register
11.2.2
Structure of a SCPI Status Register
Each SCPI register consists of five 16-bit registers that have different functions, see
. The individual bits are independent of each other, i.e. each hardware sta-
tus is assigned a bit number which is the same for all five registers. Bit
15, the most-
Status Reporting System