CHAPTER 23 VOLTAGE DETECTOR
Page 760 of 920
CHAPTER 23 VOLTAGE DETECTOR
23.1
Functions of Voltage Detector
The operation mode and detection voltages (V
LVDH
, V
LVDL
, V
LVD
) for the voltage detector is set by using the option
byte (000C1H). The voltage detector (LVD) has the following functions.
• The LVD circuit compares the supply voltage (V
DD
) with the detection voltage (V
LVDH
, V
LVDL
, V
LVD
), and generates
an internal reset or internal interrupt signal.
• The detection level for the power supply detection voltage (V
LVDH
, V
LVDL
) can be selected by using the option byte
as one of 14 levels (For details, see
• Operable in STOP mode.
• After power is supplied, the reset state must be retained until the operating voltage becomes in the range defined in
. This is done by utilizing the voltage detection circuit or controlling the externally input
reset signal. After the power supply is turned off, this LSI should be placed in the STOP mode, or placed in the
reset state by utilizing the voltage detection circuit or controlling the externally input reset signal before the voltage
falls below the operating range. The range of operating voltage varies with the setting of the user option byte
(000C2H or 010C2H).
(a) Interrupt & reset mode (option byte LVIMDS1, LVIMDS0 = 1, 0)
The two detection voltages (V
LVDH
, V
LVDL
) are selected by the option byte 000C1H. The high-voltage detection
level (V
LVDH
) is used for releasing resets and generating interrupts. The low-voltage detection level (V
LVDL
) is
used for generating resets.
(b) Reset mode (option byte LVIMDS1, LVIMDS0 = 1, 1)
The detection voltage (V
LVD
) selected by the option byte 000C1H is used for triggering and ending resets.
(c) Interrupt mode (option byte LVIMDS1, LVIMDS0 = 0, 1)
The detection voltage (V
LVD
) selected by the option byte 000C1H is used for generating interrupts/reset
release.
The reset and internal interrupt signals are generated in each mode as follows.
While the voltage detector is operating, whether the supply voltage is more than or less than the detection level can
be checked by reading the voltage detection flag (LVIF: bit 0 of the voltage detection register (LVIM)).
Bit 0 (LVIRF) of the reset control flag register (RESF) is set to 1 if reset occurs. For details of the RESF register, see
Interrupt & reset mode
(LVIMDS1, LVIMDS0 = 1, 0)
Reset mode
(LVIMDS1, LVIMDS0 = 1, 1)
Interrupt mode
(LVIMDS1, LVIMDS0 = 0, 1)
Generates an interrupt request signal by
detecting V
DD
< V
LVDH
when the operating
voltage falls, and an internal reset by
detecting V
DD
< V
LVDL
.
Releases an internal reset by detecting
V
DD
≥
V
LVDH
.
Releases an internal reset by detecting
V
DD
≥
V
LVD
.
Generates an internal reset by detecting
V
DD
< V
LVD
.
Retains the state of an internal reset by
the LVD immediately after a reset until V
DD
≥
V
LVD
. Releases the LVD internal reset by
detecting V
DD
≥
V
LVD
.
Generates an interrupt request signal
(INTLVI) by detecting V
DD
<
V
LVD
or V
DD
≥
V
LVD
after the LVD internal reset is
released.
Summary of Contents for RL78/G1H
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