Renesas 89HPES24T3G2ZBAL, User Manual

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IDT Configuration Registers
PES24T3G2 User Manual 8 - 52 February 22, 2012
Notes
VCR0STS - VC Resource 0 Status (0x218)
16 LPAT RW 0x0 Load Port Arbitration Table. This bit, when set, updates the
Port Arbitration logic from the Port Arbitration Table for the VC
resource. In addition, this field is only valid when the Port Arbitra-
tion Table is used by the selected Port Arbitration scheme (that is
indicated by a set bit in the Port Arbitration Capability field
selected by Port Arbitration Select).
Software sets this bit to signal hardware to update Port Arbitra-
tion logic with new values stored in Port Arbitration Table; clear-
ing this bit has no effect. Software uses the Port Arbitration Table
Status bit to confirm whether the new values of Port Arbitration
Table are completely latched by the arbitration logic.
This bit only has an effect in the upstream port.
This bit always returns 0 when read.
19:17 PARBSEL RW 0x0 Port Arbitration Select. This field configures the VC resource to
provide a particular Port Arbitration service.
The permissible values of this field is a number that corresponds
to one of the asserted bits in t he Port Arbitration Capability field
of the VC resource.
23:20 Reserved RO 0x0 Reserved field.
26:24 VCID RO 0x0 VC ID. This field assigns a VC ID to the VC resource. Since the
PES24T3G2 implements only a single VC, this field is hardwired
to zero.
30:27 Reserved RO 0x0 Reserved field.
31 VCEN RO 0x1 VC Enable. This field, when set, enables a virtual channel. Since
The PES24T3G2 implements only a single VC, this field is hard-
wired to one (enabled).
Bit
Field
Field
Name
Type
Default
Value
Description
15:0 Reserved RO 0x0 Reserved field.
16 PATS RO 0x0 Port Arbitration Table Status. This bit indicates the coherency
status of the port arbitration table associated with the VC
resource and is valid only when the port arbitration table is used
by the selected arbitration algorithm.
This bit is set when any entry of the port arbitration table is written
by software and remains set until hardware finishes loading the
value after software sets the LPAT field in the VCR0CTL register.
This field is always zero for downstream ports.
17 VCNEG RO 0x0 VC Negotiation Pending. Since the PES24T3G2 implements
only a single VC (i.e., the default VC) this field indicates the sta-
tus of the process of flow control initialization.
This bit
is cleared
by hardware after the VC negotiation is complete (on exit from
the FC_INIT2 state).
The value of this field is defined only when the Link is in the
DL_Active state and the Virtual Channel is enabled (its VC
Enable bit is Set).
Bit
Field
Field
Name
Type
Default
Value
Description