RTL8366/8369 & RTL8212
Layout Guide
RTL8366/8369 & RTL8212 Layout Guide
5
Track ID: JATR-1076-21 Rev. 1.1
2.
General Design and Layout
In order to achieve maximum performance with the RTL8366/8369 and RTL8212, good design attention
is required throughout the design and layout process. The following recommendations will help
implement a high performance system.
2.1.
General Guidelines
•
Provide a good power source, minimizing noise from switching power supply circuits (<100mV).
•
Verify the critical components, such as clock source and transformer, to meet the application
requirements.
•
Keep power and ground noise levels below 100mV.
•
Use bulk capacitors (4.7uF-10uF) between each power and ground plane.
•
Use 0.1uF decoupling capacitors to reduce high-frequency noise on the power and ground planes.
•
Keep decoupling capacitors as close as possible to the RTL8366/8369 and RTL8212.
•
Fill in unused areas of component side and solder side with solid copper and attach them with
vias to ground plane.
•
The RREF pin of the RTL8366/8369 and the MDI_REF pin of the RTL8212 must connect to
GND via a 2.49K +/- 1% Ohm resister. This resister must be placed as close as possible to the
RTL8366/8369 and RTL8212.
