Ameba-D User Manual
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370
0x89
[12:0]
DAC_R_BIQUAD_B1_5[28:16]
R/W
13'h0
2's complement in 4.25 format, which means that
the range is from –8~7.99.
[15:13]
RSVD
N/A
3'b000
Reserved
17.6.3.50
0x8A ~ 0x8B
Address
Bit
Name
Access
Reset
Description
0x8A
[15:0]
DAC_R_BIQUAD_B2_5[15:0]
R/W
16'h0
DAC Rch EQ 5th-band coefficient b2
2's complement in 4.25 format, which means that
the range is from –8~7.99.
0x8B
[12:0]
DAC_R_BIQUAD_B2_5[28:16]
R/W
13'h0
[15:13]
RSVD
N/A
3'b000
Reserved
17.6.3.51
0x8C ~ 0x8D
Address
Bit
Name
Access
Reset
Description
0x8C
[15:0]
DAC_R_BIQUAD_A1_5[15:0]
R/W
16'h0
DAC Rch EQ 5th-band coefficient a1
2's complement in 4.25 format, i.e. the range is
from –8~7.99.
0x8D
[12:0]
DAC_R_BIQUAD_A1_5[28:16]
R/W
13'h0
[15:13]
RSVD
N/A
3'b000
Reserved
17.6.3.52
0x8E ~ 0x8F
Address
Bit
Name
Access
Reset
Description
0x8E
[15:0]
DAC_R_BIQUAD_A2_5[15:0]
R/W
16'h0
DAC Rch EQ 5th-band coefficient a2
2's complement in 4.25 format, which means that the
range is from –8~7.99.
0x8F
[12:0]
DAC_R_BIQUAD_A2_5[28:16]
R/W
13'h0
[13]
DAC_R_BIQUAD_EN_5
R/W
1'b0
DAC Rch 5th-band EQ Biquad control
1'b0: Disable
1'b1: Enable
[14]
DAC_R_BIQUAD_WCLR_5
W
1'b0
DAC Rch 5th-band Biquad filter write clear
1'b0: Normal
1'b1: Overflow
Write "1" to send clear status pulse
[15]
DAC_R_BIQUAD_STATUS_5
R
1'b0
DAC Rch 5th-band Biquad filter status
1'b0: Normal
1'b1: Overflow
17.6.4
ADC_EQ
17.6.4.1
0x90
Address
Bit
Name
Access
Reset
Description
0x90
[0]
ADC_L_BQ_EQ_PARAM_UPDATE
R/W
1'b1
ADC Lch EQ
1'b0: Busy (Waiting for cross)
1'b1: Stand-by
Write "1" to send parameter update pulse
[1]
ADC_L_BQ_EQ_CD_EN
R/W
1'b1
ADC Lch EQ cross detection control
1'b0: Disable (Test mode)
1'b1: Enable (Normal mode)
[3:2]
ADC_L_BQ_EQ_DITHER_SEL
R/W
2'b00
ADC Lch EQ dither control
2'b00: Normal
2'b01: LSB
2'b10: {LSB+1, LSB}
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2019-05-15 10:08:03
