RCA Spectra 70 Training Manual Download

Page: 1 / 63

Summary of Contents for Spectra 70

Page 1: ......

Page 2: ...5iFlE _ I RADIO CORPORATION OF AMERICA ELECTRONIC DATA PROCESSING RADIO SYSTEM 7C25i TRAINING MANUAL CORPORATION 70 25 801 o F AMERICA ...

Page 3: ...The information contained herein is subject to change without notice Revisions may be issued to advise of such changes and or additions First Printing December 1964 Second Printing January 1965 ...

Page 4: ...thmetic Overflow and Divide Exception 10 Elapsed Timer Interrupt 11 Inhibiting Interrupt 11 Exercise 11 Summary of Interrupt Logic 12 Elapsed Time Clock 13 Introduction to the RCA 70 25 Assembly Language 14 Format Requirements 14 Addressing 14 Self Defining Values 16 Expressions 16 Implied Lengths 17 Assembler Controlling Codes 17 Define Storage DS 18 Origin Code ORG 18 Constant Definition DC 0 18...

Page 5: ...Instructions Load Multiple LM Store Multiple STM Binary Arithmetic Instructions Binary Add AB and Subtract SB Exercise Logical Instructions Logical And NC Logical Or OC Exclusive Or XC Use of Logicals Test Under Mask Instruction TM Data Translation Translate TR InputlOutput Introduction Read Instructions RDF and RDR Writing Data WR and WRE Controlling Peripheral Devices Error Recognition Flow Char...

Page 6: ...propriate outside assignments and work sessions to 45 hours or more depending upon the experience ofthe student People with good and recent programming experience may find the text helpful in self study Principal references which should be used in either formal or self study situations are 1 70 25 Assembly Manual 2 70 25 System Reference Manual iii ...

Page 7: ...tates the Proces sing State and the Interrupt State The Processing State is the normal mode of operation A condition that causes interrupt will transfer the computer to the Interrupt State Interrupt is mechanized in the 70 25 hardware It automatically senses the pres ence of interrupt conditions and transfers control to the Interrupt State INSTRUCTION COMPLEMENT The RCA 70 25 Order Code consists o...

Page 8: ...heral devices through eight I O channels 2 Each peripheral device contains its own control electronics in order to transmit to the processor the status of the device and any error conditions generated by an I O command Each channel is a separate simultaneous mode allow ing execution overlap with other channels and the processor An II0 termination interrupt is included in the system to facilitate e...

Page 9: ... must begin at even word boundaries see page 41 HSM ADDRESSING The address of each byte location is expressed as a binary number Sixteen bits are required to ad dress the highest location of a four plane system 65 536 3 Examples BINARY ADDRESS 215 214 213 212 211 210 29 28 27 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 1 1 0 1 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 26 25 24 23 0 0...

Page 10: ...BERING SYSTEM The binary system although efficient for the 70 25 is not a convenient notation for the programmer The hexadecimal numbering system which operates on the base sixteen is a convenient method to express the binary representation of HSM addresses The decimal system is a numbering system based upon the number ten It uses ten single symbols 0 9 to represent the basic digits By a system of...

Page 11: ... hexadecimal ad dress 3AF has a decimal value of 943 Exercise 1 A byte consists of__ information bits and a___ bit and is the___ addressable unit in the 70 25 HSM 5 2 An effective HSM address is the absolute sum of a and a____ 3 Base address values are stored in The ___and or fields of an instruction specify which base address will be used to com pute an effective address 4 The decimal value of a ...

Page 12: ...d in a decimal arithmetic operation 6 PACKED DATA FORMAT In packed data format one byte stores two decimal digits except for the rightmost byte which contains the sign in the four low order bits The following example shows the same field in un packed and packed format Each location represents a byte shown in hexadecimal format UNPACKED PACKED 1FO 1 F3 1 F1 I F6 1 F2 1 F1 I 80 I 103 I 16 1 21 1 OS ...

Page 13: ...n a two address instruction the fifth and sixth bytes constitute the Band D field of the second address The machine formats and the type of instructions using each format are shown below SIX BYTE INSTRUCTIONS Binary Arithmetic Decimal Arithmetic Decimal Comparison Packing and Unpacking Data Movement Logical Operations And Or Excl Or Logical Comparison Data Editing Input Output 7 FOUR BYTE INSTRUCT...

Page 14: ... Each displacement field accommodates negative signs a 12 bit address T F 5 The Bl or B2 fields of machine instruc T F 7 An instruction is variable in length tion format contain the HSM address of either two three four or six bytes a general register 8 ...

Page 15: ...erved HSM forty four 2C 16 and forty five 2D 16 BYTE 44 10 P2 COUNTER 9 The system is now in the Interrupt State Each time an instruction is staticized the contents of the P2 counter is updated to contain the address of the next instruction to be executed All thirty one instruc tions may be executed in the P2 state and the com puter remains in this state until a STPP2 instruction see page 39 is ex...

Page 16: ...tion forty seven would contain Trunk 3 Device 1 10 OPERATION CODE TRAP If an instruction is staticized in which the Operation code is not one of the thirty one legitimate codes an interrupt is initiated This interrupt is called an Operation Code Trap Prior to entering the P2 state the computer auto matically 1 Stores the state of the Condition Code Indicator in the 20 21 bits oflocation forty thre...

Page 17: ...lapsed Timer Arithmetic Overflow and MULTIPLEX CHANNEL interrupts 21 Overflow 22 Timer 20co Multiplex Channel A mask of 101 in the 22_20 allows Timer and Multi plex interrupt but inhibits interrupt caused by arithmetic overflow or divide exception INTERRUPT PRIORITIES Op Code Trap immediate I O 1 Elapsed Timer 2 Overflow and Divide Exception 3 11 Exercise T F 1 Only fifteen of the thirty one 70 25...

Page 18: ...p Code Trap Neither Arithmetic Overflow or Elapsed Timer Transfer to Interrupt State Identify Interrupt CC Setting and Process Accordingly STP2 Register Return to Processing State 12 No I O Instruction Interrupt Pending Interrupt Inhibited By Mask HSM 49 No Yes Store 1 CC in HSM 43 2 TK and DV in HSM 47 3 Stand DV Byte in HSM 48 Set CC to 00 2 r HARDWARE PROGRAMMING 1 ...

Page 19: ...e power or 77 hours later using 60 cycle power The number of adds required to clock off more meaningful time intervals are indicated below 60 CYC LE POWER 16 2 3 MILLISECONDS 1 SECOND 30 SECONDS 1 MINUTE 30 MINUTES 1 HOUR 1 ADD 60 ADDS 1800 ADDS 3600 ADDS 108 000 ADDS 216 000 ADDS 13 The overflow value of the 24 bit Timer is 16 777 216 10 Let us assume we wish to generate an interrupt every minute...

Page 20: ...comment may appear in any statement line fol lowing the OPERAND entry It must be separated from the required OPERAND entry by at least one blank column The entire statement line to Col 71 may be used for a comment if an asterisk appears in Column 1 14 IDENTIFICATION FIELD The contents of the IDENTIFICATION field has two functions In the START statement the first four positions columns 73 76 may co...

Page 21: ... the base address that gives the least displacement and com putes the B1 D1 or B2 D2 field in the object instruc tion Assume the two names ABLE and BAKER have been assigned the addresses 3850 10 and 8173 10 in the symbol table The assembly subtracts a smaller base value from the effective Symbol Table Address The difference is the displacement 15 3850 8173 0100 4195 3750 3978 If the displacement e...

Page 22: ...s in single quote marks preceded by an X This option is used to represent binary configurations such as masks Examples OPERAND X 3F Represents the binary config uration 0011 1111 16 CHARACTER A character may be specified by enclosing it in single quote marks preceded by a C Example OPERAND CtA The character A or in binary 1100 0001 is desired Example The three statements below generate the same va...

Page 23: ...catable expressions DOG DOGel03 910 DOG CAT e FIGHT ABLE 437 6 17 Illegal Expressions 1 OO l CAT 2 50 HOPE 3 DOG CAT HOPE 4 176 DOG 5 OOG CAT HOPE IMPLIED LENGTHS Contains two relocatable symbols Multiplication of relocatable symbol No subtraction operator Single relocatable symbol preceded by Two subtraction operators The length of an operand may be implied by omitting any reference to length in ...

Page 24: ...TION OPERAND INAR DS 80C ORG INAR NACN DS lOC NCOD DS 2C NDAT DS 4C New Account NCUS DS 25C I Transaction NADR DS 30C NTYP DS 2C NAMT DS 7C 18 Example ORG and DS Codes Cont cJ NAME OPERATION OPERAND ORG INAR PACN DS lOC I PCOD DS 2C I PDAT DS 4C Payment PAMT DS 7C 1 Transaction PTYP DS 2C RACN ORG INARl RCOD DS lOC RDAT DS 2C Receipt RAMT DS 4C Transaction DS 7C ORG INAR 80 Reset Location Counter ...

Page 25: ...it does not correspond to the physical length of the cv value NAME OPERATION OPERAND GENERATED DC DC DC 2CL3 t ABC t ABCABC 2XL5 3F6 00000003F600000003F6 2CL2tlAB lAlA In the third example above the B rightmost char acter of the constant lAB was truncated because a length of two was specified In like manner the constant defined on the second line was padded out to a length of five If an explicit l...

Page 26: ...am contains sections which are to be load ed individually the second and succeeding sections must begin with a CSECT control code START CODE In addition to flagging the start of the source pro gram a START code can set the location counter to an initial value and identify an entry into the pro gram START must appear in the OPERATION field A self defining value written in the OPERAND field sets the...

Page 27: ... will be in specific general re gisters at object time The Assembler creates a table of these values and then uses them to assign 21 registers and to compute displacements when base references are not included in an expression See page 3 The first operand denotes the value assumed to be in a register The second operand specifies the regis ter NAME OPERATION OPERAND USING USING STARTP 6 5 10 6 The ...

Page 28: ...hether the follOWing statements are true 0 r false T F T F T F T F T F a b c d e A DS code reserves a portion of memory and clears the reserved area to blanks Three types of constants may be de fined with the DC instruction The length of a constant must be ex plicit If the length of a constant defined by a single DC statement is 17 bytes the rightmost byte will be truncated A hexadecimal constant ...

Page 29: ...ength of 6 23 What would the statement generate 13 Write a statement allocating a work area of 100 bytes Align the left hand end of the area on an even word boundary 14 How are 32 bit relocatable expression constants defined 15 Using the EQU command write statements equating a b the address of the name BEGIN to the name ENDP the name NINE to the value 9 16 Describe the purpose of the USING and DRO...

Page 30: ...yte or one word at a time from a sending to a receiving field The number of bytes transferred is control led by the L Register When possible the hardware accesses a word at a time The L character sent to the L Register in the staticizing process is one less than the number of characters to be transferred in machine format because 1 the first character is transferred before the L Register is decrem...

Page 31: ...this exercise assume memory to be allocated as follows NAME OPERATION OPERAND ORG 2000 WORK DS 5C NAME DS 10C BAL DS 6C DATA DS 5C ORG 2100 WA1 DS 26C PART I Write the instructions to perform the following oper 25 ations Place your answers in the space provided 1 Move Work to Data 2 Zero fill the Bal field Assume the first byte of Bal is a zero 3 Clear the Work and Name fields to blanks Assume the...

Page 32: ... follows 26 NAME OPERATION OPERAND WAMT DS 5C It should be noted that the unpacked field AMT can be packed into a much smaller field WAMT The least significant byte of the unpacked field is the only byte that fully occupies a byte position in the packed field All other bytes are stripped of the zone portion before transfer to the packed field Therefore a quick way of determining the number of byte...

Page 33: ...h the result in the field PBAL ASSEMBLY INSTRUCTIOX OP GENERATED INSTRUCTION IF316 I OPERATION OPERAl ID UNPK PBAL 7 BAL 4 Ll L2 Bl Dl B2 D2 6 1 3 1 210 I 094110 1 110 14050101 General Register one contains 0000 General Register two contains 4096 10 27 UNPACKED RECEIVING FIELD F F16 11112 S Sign PBAL 50 37 38 39 40 41 42 43 FO FO F1 F7 F2 F4 S3 The receiving unpacked field can be considered the co...

Page 34: ...RECAST REQUIREMENT 8 5 MANUFACTURER 15 6 MFGR S ADDRESS 20 7 MFGR S CITY STATE 15 8 STOCK ON HAND 7 9 RESERVE REQUIREMENT 6 10 DUE IN 6 11 REVIEW DATE 6 Items preceded by an asterisk are signed numeric fields Unpacked Requirement No 1 Allocate memory for the Input Record beginning at 3000 and for the output record beginning at 3100 The output record area is allocated in the same for mat sequence a...

Page 35: ...6 12 I2 1 210 1 091110 1 210 1105410 I INSTRUCTION General Register two contains 409610 29 the result field will appear and the Condition Code Indicator will be set as follows BAL 06 07 08 09 50 23 10 70 6 CONDITION CODE 3 overflow When overflow occurs the position to the left of the result field HSM 5006 above is not affected by the 1 carry out of the MSD of the result The overflow setting Condit...

Page 36: ...ill and pre serve the sign pOSition ASSEMBLY OPERATION OPERAND INSTRUCTION SP WBAL 4 WBAL 4 GENERATED INSTRUCTION General Register two contains 409610 30 RESULT FIELD WBAL 43 44 45 46 61 t 00 00 00 0 MULTIPLY DECIMAL Multiplication may be performed on two packed oper ands The result product replaces the first oper and multiplicand following execution of the instruc tion The number of leading zeros...

Page 37: ... I8 I 112 117 I54 I31 I8 I 2 The divisor digits when aligned with the digits one position to the right of the leading zero of the dividend have a lesser or equal value 31 Example I01 I751 42 1 1 I DIVIDEND VALID 1411 7 I DIVISOR 101 I751 42 1 1 I DIVIDEND INVALID 1 04 11 I DIVISOR A divide exception interrupt is avoided by position ing the dividend with sufficient leading zero digits For example a...

Page 38: ...MT 5 2 1 AMT 4 5 1 2 Write an assembly statement multiplying the contents of area TOTAL by the contents of area PRICE 1000 1001 1002 1003 1004 1005 TOTAL 8 3 6 0 4 7 8 4 4 3 o 1200 1201 1202 PRICE 411 01 4 61 4 NAME OPERATION OPERAND 32 3 Show the contents of TOTAL area after execu tion TOTAL Assume six values stored in HSM Write the assembly statements necessary to compute the average value Place...

Page 39: ... character serves the same function as the Digit Select character with one added function it specifies that all of the following digits are to be inserted from the packed field even if one or more leading zeros are still present X 22 FIELD SEPARATOR This character is used for editing multiple fields it specifies the end of one and the start of another field and resets the edit operation for the be...

Page 40: ...ackedfield in the Edit Mask where a Digit Select character is present The 1 set ting also specifies insertion of editing symbols pres ent in the Edit Mask The setting of 1 is retained until either a plus sign is encountered in the packed field or a field separator character is encountered in the Edit Mask Either of these conditions resets the trigger to zero The Edit instruction sets the Condition...

Page 41: ... 35 Example 5 Editing multiple fields HSM BEFORE AND AFTER EXECUTION HSM BEFORE EXECUTION ASSEMBLY INSTRUCTION HSM AFTER EXECUTION SIGNIFICANCE TRIGGER AMTS 00 01 02 03 04 05 01 23 7 00 29 5 MASK 121 Io d d S d d C Rf f f d d S d d C R2 1 OPERAND MASK 22 AMTS MASK 121 Io _ 1 2 3 7 ________ 2 9 5 C R2 o 1 7 0 l O CONDITION CODE 1 Based on last field processed It should be noted that the field separ...

Page 42: ...l Deposits to the Previous Balance b Subtract the Total Checks from the Previous Balance c Prepare an output record in the edited format The output record is in the format ACCOUNT NO 8 CHARS BLANKS 4 CHARS TOTAL DEPOSITS 12 CHARS BLANKS 4 CHARS TOTAL CHECKS 12 CHARS BLANKS 4 CHARS PRESENT BALANCE 12 CHARS BLANKS 76 CHARS EDIT FORMAT ZZ ZZZ DDS BLANK Z D S SUPPRESSED ZERO BLANK OR DIGIT DIGIT SIGN ...

Page 43: ...TER EXECUTION ASSEMBLY INSTRUCTION ADRI 00 01 20 400710 OFA7 16 OPERATION CLC ADR2 02 03 20 401710 OFBI 1G OPERAND I ADRl 2 ADR21 37 GENERATED INSTRUCTION OP General Register one contains 0000 CONDITION CODE FIRST OPERAND LOW COMPARE DECIMAL CP INSTRUCTION The Compare Decimal instruction tests the relative algebraic value of two packed operands The oper ands may be of unequal length However the fi...

Page 44: ...overflow has occurred or to an overdraft OVDF routine if the result of the sub traction is negative For a positive or zero result he enters a process PRCS routine The coding would be NAME OPERATION OPERAND SP IBAL 4 AMT 3 SUBTR AMT FROM BAL I CC3 Be X I ERRT BR TO ERROR RTN eel Be X 4 OVDF BR TO OVERDR RTN PRes ENTER PRoe RTN 38 An unconditional transfer of control takes place if all the high orde...

Page 45: ...is instruction transfers control from the Interrupt State to the Processing State It sets the P2 Register with the desired value and transfers to the address contained in the PI Register Reserved Locations 40 and 41 The Condition Code Indicator is also reset to the Con dition Code that existed at the time the Processing State was interrupted In addition the hardware in terrupt register is reset by...

Page 46: ...E OPERATION OPERAND 4 CLC ABC 4 DEF 5 CLC GHI 2 JKL 6 CLC MNO 8 PQR 09 01 40 PQR JKL ABC W W 10 11 12 13 14 15 16 17 18 19 20 24 57 AB CD EF AA AO FO Fl F4 F7 Based on the above indicate which instruction would be executed next NI NEXT SEQUENTIAL INSTRUCTION 7 OPERATION OPERAND NI ___UPD CP SIX 1 2 ONE 3 BC X B UPD 8 OPERATION OPERAND NI___ NEWD __ CP FIVE 3 TWO 3 BC X 7 NEWD 9 OPERATION OPERAND N...

Page 47: ...EXECUTION ASSEMBLY INSTRUCTION NAME 2 7 ALPHA 1 I 000010 3 I 819210 5 I 1638410 7 I 2457610 OPERATION LM 2 I 409610 4 I 1228810 6 I 2048010 8 I 2867210 OPERAND 2 7 ALPHA 41 OP B2 GENERATED INSTRUCTION 1 9816 210 710 110 240016 1 GENERAL REGISTER 1 000010 AS ABOVE GENERAL REGISTERS 1 8 1 2 FOLLOWING EXEOUTION I 000010 100010 3 4 I 200010 300010 5 6 I 500010 600010 7 8 I 700010 2867210 STORE MULTIPL...

Page 48: ...ith a branch to read if the input area has been exhausted is used to determine when the last record is processed The Input Block Record Processing and constant areas could be allocated as follows ALLOCATION OF INPUT AND RECORD PROCESSING AREA NAME OPERATION OPERAND ORG 3000 INP os 400C RPR DS 80C ORC RPR ACCT DS 8C NAME DS 25C ADR DS 30C AMT DS 10C FILL DS 7C HSM ALLOCATION 3000 3399 3400 3479 340...

Page 49: ... Subtract BIN CTR From TLY NAME IN2 NAME IN3 NAME IN4 NAME IN5 _r NAME IN6 NAME IN7 NAME 43 OPERATION OPERAND MVC IN4 2 RDIN OPERATION OPERAND MVC TLY 1 TLY 1 OPERATION OPERAND MVC RPR 80 INP OPERATION OPERAND AB IN4 4 2 INCR 2 w RECORD PROCESS CODING NOT SHOWN OPERATION OPERAND SB TLY 1 CTR 1 OPERATION OPERAND BC X 8 IN1 OPERATION OPERAND B IN4 ...

Page 50: ...uestion independently based on the contents of the locations of Line 1 In Column II show the Condition Code that will be set following the execution of each instruction Column I Column II ADD BINARY CONDITION CODE OPERATION OPERAND 1 AB A 3 B 3 2 AB C 4 D 4 3 AB E 2 F 2 SUBTRACT BINARY OPERATION OPERAND 4 SB D 3 G 3 5 SB H l 1 1 6 SB 1 5 J 2 44 ...

Page 51: ...11 1010 FF FA OPERATION OPERAND NC AD1 2 INC OP L B1 D1 B2 D2 D4 16 1 110 3000 10 110 3100 10 General Register one contains 0000 0000 0000 1001 10 0 CONDITION CODE 1 45 OR INSTRUCTION This instruction maybe used to insert 1 bit s in any bit position s of a byte The rule of OR is that a 1 bit in the same relative position of either field produces a 1 bit in the same position of the result Example H...

Page 52: ... the right of the digits in an edited field Thus a field may be made pseudo negative for fields of a prescribed value For example if an asterisk is 46 desired to the right of any edited balance field below 100 00 the packed field sign position could be al tered to a negative sign See OR example The Condition Code Indicator is set by the Logical instructions It is set to zero if all of the bits in ...

Page 53: ... Thus any character in the data field except an unpacked numeric can address a byte filled with one bits Ifthe original data field must be preserved the trans lationmaybeperformedfrom a Work area Assume the data field has been transferred to a work area and appears as follows shown in hexadecimal WAMT 00 01 02 03 04 05 06 07 08 09 FO FO F2 F7 F6 F3 C3 F2 F8 F1 47 It should be noted that all charac...

Page 54: ...ding example a field could be tested for alpha or numeric content Any other character will translate into a 1 bit filled byte For example assume the field contained a period an invalid character A period has a bi nary value of 01001011 2 or 7510 It would address the 75th position of the table and be replaced by a 1 bit filled byte The previous examples have illustrated the Translate instruction fo...

Page 55: ...s The total theoretical data rate available on the 70 25 is 667KB Because the medium speed channels and multiplexor take more time to process each byte than the high speed channels devices operating on the slower channels must have their peak data rates mul tiplied by a weighting factor in the determination of total equivalent data rate These weighting factors are 2 for a device operating on a med...

Page 56: ...RAND WR 3 1 OUTP OUTP 79 prints the contents of HSM 1200 1279 OUTP area to the Printer Base addresses are implied The same command with channel number changed OPERATION OPERAND WR 4 1 OUTP OUTP 79 50 writes a block of eighty bytes to tape 1 on channel 4 or OPERATION OPERAND WR 2 1 OUTP OUTP 79 punches a card The Erase WRE instruction is a Write command however it can only erase a section of magnet...

Page 57: ...on that develops during the execution of an I O instruction does not halt the computer If the selected device is busy the instruction is staticized until the device is available I O instruc tions set the Condition Code to one of three conditions If the device is inoperable the instruction terminates and the Condition Code is set to one 1 If the in struction has been accepted for execution by the C...

Page 58: ...are and programming logic for basic I O I I Yes STATICIZE I O INSTRUCTION No BRANCH ON CONDITION CODE 1 or 2 CC 0 INSTRUCTION ACCEPTED FOR EXECUTION 52 I I Hardware I I CC 1 or 2 BRANCH ON 2 CONDo CODE 11 DEVICE IS INTERRUPT INOPERABLE PENDING ...

Page 59: ...o methods 53 One If I O Interrupt is not inhibited hardware automatically stores the Standard Byte in reserved memory location 46 10 when interrupts occurs Two If I O Interrupt inhibited it is neces sary to execute a Post Status PS instruc tion This command stores the Standard Byte in one of eight reserved locations depending on which channel is addressed If the instruction OPERATION OPERAND PS 2 ...

Page 60: ... Error Progress Progress Service Intervention Non Printable 23 Not Used Required Short Message Time Out Code 24 Invalid Transmission Transmission Transmission Punch Code Parity Error Error Write Error Parity Error Pocket unch Memory Data Block 25 Selection Not Used Not Used Too Late Parity Error Than Count Service Service 26 Request Not Not Used Request Not Not Used Not Used Honored Honored Read o...

Page 61: ...YES POST STATUS MOVE INPUT TO PROCESSfNG AREA PROCESS 55 1 or 2 ...

Page 62: ... E RR BR AN CH I F I T I S SErr B RE AD BR AN CH TO R EA D N DO B C XI 2 I C D 2 T E ST FO R I N OP ER AB L H C 0 ND I T I pN b NE C to 2 H C 0 ND I T I b N T W 0 E R lOS 4 1 S E NS SE N S R E AD I N S E NS E BY TE T M S E NS M S Kl T ES T I F F 0 R TR A NS OR R E A D E R ROR B C XI 1 I B RA NC H I F ER R 0 R B RE AD B RA NC H TO RE A D S rE N S D S 1 C I P T D S 1 0 o C M S K 1 D S XI o 4 I M S K...

Page 63: ... each r o command T F 9 The purpose of r o termination inter rupt is to transfer the Standard Device Byte into HSM T F 10 A Post Status Commandwill terminate and control will be passed to the next T 57 instruction if the channel addressed is busy F 11 If a device is inoperable and a read orwrite is directed to it the Secondary Indicator of the Standard Device Byte is set and int errupt takes place...

Search results

Summary of Contents for Spectra 70

Reviews:

Related manuals for Spectra 70

Brands by name

Popular brands

RCA Spectra 70, Training Manual

Search results

Summary of Contents for Spectra 70

Reviews:

Related manuals for Spectra 70

Brands by name

Popular brands