PowerPact6 Processors
Family Product Manual
Publication No. CP-0HH
1
st
Edition, October 2005
© Radstone Technology PLC
Page 1: ...PowerPact6 Processors Family Product Manual Publication No CP 0HH 1st Edition October 2005 Radstone Technology PLC...
Page 2: ...on relating to products or services concerned The Company reserves the right to alter without notice the specification design price or conditions of supply of any product or service Trademarks Radston...
Page 3: ...mmability 1 5 EMI EMC Regulatory Compliance 1 5 Handling 1 6 Heatsink 1 6 About This Manual 1 7 Objectives 1 7 Audience 1 7 Scope 1 7 Structure 1 7 Conventions 1 8 Associated Documents 1 9 World Wide...
Page 4: ...ites 5 8 Jx1 32 bit PCI Connector Pinout 5 9 Jx2 32 bit PCI Connector Pinout 5 9 Jx3 64 bit PCI Connector Pinout 5 10 J14 User I O Connector Pinout 5 11 J24 User I O Connector Pinout 5 11 PCI PMC Sign...
Page 5: ...Pact6 family is available in a range of build styles from Level 1 Standard suitable for a benign office like environment right through to Level 5 Rugged Conduction cooled capable of withstanding the h...
Page 6: ...ront I O connectivity only available on build levels 1 to 3 includes serial and USB plus access to the on board PMC sites To maximize the flexibility of connecting to the rear I O backplane modules an...
Page 7: ...hiefly through O S mechanisms and does not compromise the machine state imposed by the O S Radstone s BCS for VxWorks is downloadable or can be linked to the VxWorks executable image It can be launche...
Page 8: ...IX offers complete memory management support including MMU based protected address spaces for tasks With comprehensive POSIX API conformance 1003 1 1b and 1c LynxOS also exhibits true linear scalabili...
Page 9: ...versed bias to the assembly If such conditions occur toxic fumes may be produced due to the destruction of components Power supply problems must only be dealt with by qualified personnel Backplane Req...
Page 10: ...ere are no PROMs or other user alterable components underneath the heatsink so users should have no reason to remove it Users should not attempt reattachment of the heatsink as this requires precise t...
Page 11: ...e description of configuration installation and power up as simple and user friendly as possible a certain amount of background knowledge on these subjects is assumed Scope This manual describes All b...
Page 12: ...terminology multiple bit fields are numbered from 0 to n where 0 is the MSB and n is the LSB PCI and VMEbus terminology follows the more familiar convention that bit 0 is the LSB and bit n is the MSB...
Page 13: ...t6 Manual publication number CPESP TOR0HU LynxOS BSP for PowerPact6 Installation Manual publication number CPBSP LNXxHL LynxOS ESP for PowerPact6 Manual publication number CPESP LNX0HL PPCBoot User Gu...
Page 14: ...nse Agreement RT5087 4 Where to find the latest product manuals leaflet only included with the very latest hardware products Note Configuration links jumpers may be separately packaged inside the box...
Page 15: ...n BIT and PPCBoot startup banners The revision number given when a VxWorks sysBoardShow command is executed Inspection CAUTION PowerPact6 processors are subject to damage by static electricity Observe...
Page 16: ...bited This protects both the PowerPact6 processor and the PMC from burning up tracks or destroying parts Each PMC is supplied with a full kit of parts for mounting it full fitting instructions and a m...
Page 17: ...D ROM Chassis Configuration Unlike VME backplanes the CompactPCI backplane does not use daisy chains for bus requests or interrupt acknowledgements so no configuration of the backplane is required bef...
Page 18: ...e current to be drawn through the power pins This equipment generates uses and can radiate electromagnetic energy It may cause or be susceptible to electromagnetic interference EMI if not installed an...
Page 19: ...its board ID using geographical addressing 2 Push the board firmly home to ensure that backplane connectors mate correctly 3 For air cooled boards tighten the captive screws at the top and bottom of t...
Page 20: ...Observe antistatic and safety precautions when handling and or installing I O Modules Figure 4 1 overleaf shows a typical cross development system set up This example is for guidance only and is not d...
Page 21: ...PowerPact6 Processors Family Product Manual System Set up 1st Edition 4 2 Figure 4 1 I O Connections...
Page 22: ...nnections should be made using suitable standard or Radstone specific cables Connections shown indicate possible options some of which may not be suitable or possible on all systems The system shown i...
Page 23: ...d 9600 Data bits 8 Parity None Stop bits 1 Flow control None Since the COM port is Tx Rx only turn off any handshaking options on the terminal terminal emulation software T FTP RSH settings should all...
Page 24: ...rminal emulator window terminal screen or monitor If the boot sequence appears not to initiate power down the system and check all RS232 and monitor connections Also check that the PowerPact6 processo...
Page 25: ...it Ethernet Modules PMC1 OUT PMC2 OUT AFIX OUT BIT Master Boot Mode MAIN PPCBIT Details Version No V3 0 0 0 ALPHA Part No TB0712 001 Built Aug 18 2005 15 40 55 BIT Checksum d98ca94e MPE tests successf...
Page 26: ...OCAL SELF_TEST passed Default action is Options Menu Press any key to abort default action Options Menu 1 System Description 2 Special Functions 3 Comprehensive BIT 4 Default BIT Application 5 Execute...
Page 27: ...ss stopped by a key press within the seven second period the boot loader attempts to proceed with the specified configuration VxWorks System Boot Copyright 1984 2005 Wind River Systems Inc CPU Radston...
Page 28: ...Set up 1st Edition 4 9 VxWorks Copyright 1984 2005 Wind River Systems Inc CPU Radstone CP1A 7447A Runtime Name VxWorks Runtime Version 6 1 BSP version 2 0 1 0 Created Sep 22 2005 14 38 40 ED R Policy...
Page 29: ...ng to the PICMG 2 0 R3 0 specification Hot Swap PICMG 2 1 is also implemented 3 3V signaling voltage is used with tolerance of 5V inputs The PowerPact6 processors may operate either as System Controll...
Page 30: ...AD 13 GND 18 SERR GND 3 3V PAR CBE 1 GND 17 3 3V No Connection No Connection GND PERR GND 16 DEVSEL GND V IO STOP LOCK GND 15 3 3V FRAME IRDY BD_SEL TRDY GND 14 13 12 Keying Area 11 AD 18 AD 17 AD 16...
Page 31: ...er must sample FRAME and IRDY both de asserted and GNT asserted on the same rising edge of the PCI CLK signal See also TRDY GNT PCI Grant signal CLK PCI clock signal 33 or 66MHz TRDY Target Ready is d...
Page 32: ...onjunction with TCK to shift data into the TAP in a serial bit stream TCK JTAG Test Clock used to clock state information and data into and out of the TAP during boundary scan TMS JTAG Test Mode Selec...
Page 33: ...ction GND FAL REQ5 GNT5 GND 14 AD 35 AD 34 AD 33 GND AD 32 GND 13 AD 38 GND V IO AD 37 AD 36 GND 12 AD 42 AD 41 AD 40 GND AD 39 GND 11 AD 45 GND V IO AD 44 AD 43 GND 10 AD 49 AD 48 AD 47 GND AD 46 GND...
Page 34: ...o REQ6 Bus Request from slots 3 to 6 respectively GNT1 to GNT6 Bus Grant to slots 3 to 6 respectively GA0 to GA4 CompactPCI geographical address bits 0 to 4 respectively V I O PCI I O voltage referenc...
Page 35: ...ND GND 13 GND Open Open GND Open 14 GND Open Open Open GND 15 GND Open Open Open Open 16 Open GND GND GND GND 17 Open GND GND GND Open 18 Open GND GND Open GND 19 Open GND GND Open Open 20 Open GND Op...
Page 36: ...t 33 MHz This combination of PCI and PCI X allows a state of the art and a legacy PMC to be run simultaneously with no loss of performance Front panel I O is fully supported on levels 1 to 3 and with...
Page 37: ...16 GNT_A 15 3 3V 16 BUSMODE4 17 REQ_A 18 5V 17 Reserved 18 GND 19 VIO 20 AD 31 19 AD 30 20 AD 29 21 AD 28 22 AD 27 21 GND 22 AD 26 23 AD 25 24 GND 23 AD 24 24 3 3V 25 GND 26 CBE 3 25 IDSEL_A 26 AD 23...
Page 38: ...ND 15 GND 16 AD 60 17 AD 59 18 AD 58 19 AD 57 20 GND 21 VIO 22 AD 56 23 AD 55 24 AD 54 25 AD 53 26 GND 27 GND 28 AD 52 29 AD 51 30 AD 50 31 AD 49 32 GND 33 GND 34 AD 48 35 AD 47 36 AD 46 37 AD 45 38 G...
Page 39: ...19 17 D10 18 C10 19 B19 20 A19 19 B10 20 A10 21 E18 22 D18 21 E9 22 D9 23 C18 24 B18 23 C9 24 B9 25 A18 26 E17 25 A9 26 E8 27 D17 28 C17 27 D8 28 C8 29 B17 30 A17 29 B8 30 A8 31 E16 32 D16 31 E7 32 D7...
Page 40: ...ta phase PERR Parity Error Driven low by a PCI agent to signal a parity error SERR System Error Driven low by a PCI agent to signal a system error STOP STOP Driven low by a PCI target to signal a disc...
Page 41: ...rface For enhanced I O flexibility the PowerPact6 processors offer a plug on module interface that adds rear I O functionality via J4 and J5 The Additional Flexible Interface Xtension AFIX card is a f...
Page 42: ...O_H11 HDO_H9 14 PCI2_AD 8 PCI2_AD 27 HDI_H14 PCI2_CBE 1 IDSEL3 PCI2_REQ64 CARD_FITTED AFIX I O GND HDO_H12 15 PCI2_AD 9 2V5 HDI_H15 2V5 IDSEL4 2V5 ALEN GND AFIX I O GND 16 2V5 PCI2_AD 28 2V5 PCI2_CBE...
Page 43: ...gnal a disconnect or target abort PCI_PAR Parity Parity protection bit for AD0 to AD31 and BE0 to BE3 IRQW IRQX IRQY IRQZ PCI interrupts REQ0 to REQ3 PCI bus request by up to 4 devices on the AFIX mod...
Page 44: ...st Data Input TDO JTAG Test Data Output TCK JTAG Test Clock TMS JTAG Test Mode Select TRST JTAG Test Reset Power and Ground 2V5 2 5V DC power 3V3 3 3V DC power 5V 5 Volts DC power 12V 12 Volts DC powe...
Page 45: ...t A brief description of each build style follows Level 1 Intended for use in benign environments level 1 also provides the ideal cost effective method of complete system development The level 1 assem...
Page 46: ...00 to 2000 Hz 20g peak sawtooth 11ms duration Up to 95 RH with varying temperature 10 cycles 240 hours Wide temperature rugged cooled by forced air Conformally coated for additional protection Conduct...
Page 47: ...ly to be fitted into any commercial CompactPCI Bus development chassis Level 4 and 5 boards also comply with ANSI VITA 30 1 2002 2mm Connector Equipment Practice on Conduction Cooled Euroboards The fo...
Page 48: ...PowerPact6 Processors Family Product Manual Build Styles and Dimensions 1st Edition 6 4 Figure 6 2 Additional Requirements of ANSI VITA 30 1...
Page 49: ...erred method is by e mail to support radstone co uk Please provide the information required in the above form If you do not have either web or e mail access you can still telephone for technical suppo...
Page 50: ...nfigured as system controller in a system and that this is in the appropriate System Controller slot in the chassis Prove the PowerPact6 processor s operation in isolation before adding it into a mult...
Page 51: ...veloped by the PICMG and defining a ruggedized version of PCI to be used in industrial and embedded applications With regard to electrical logical and software functionality it is 100 compatible with...
Page 52: ...ons 6 3 Documentation Audience 1 7 Documentation Conventions 1 8 Documentation Objectives 1 7 Documentation Scope 1 7 Documentation Structure 1 7 E Embedded Software Setup 4 5 EMI EMC 3 4 Regulatory C...
Page 53: ...ptions AFIX 5 15 J1 5 3 J2 5 6 PMCs 5 12 Size 6 3 Software Support 1 3 Storage Environment 6 2 System Set up 4 1 System Software Setup 4 4 T Technical Help Contact Details 7 1 Tornado 1 4 Troubleshoot...
