Radio Shack TRS-80 Model 16 Service Manual Download Page 1

Summary of Contents for TRS-80 Model 16

Page 1: ...ervlce CUSTOM MANUFACTURED IN U S A BY RADIO SHACK A DIVISION OF TANDY CORPORATION...

Page 2: ...permission from Tandy Corporation of any portion of this manual i5 prohibited Whi e reasonable efforts have been taken in the preparation of this manual ta assure its accuracy Tandy Corporation assum...

Page 3: ...Model 16 TRS SO Service llanual COntents Introduction 5 3 Troubleshooting Operation 11 37 7 of 2 Theory l Specifications 4 Printed Circuit Boards 41 5 parts List 61 6 Schematics 75 i 1tadle1Mell 3...

Page 4: ...Model 16 _____________ TR5 BO e s_e_r__ v i c e Dual _ i ltadlellllleli 4...

Page 5: ...e MC68 and the Z 8 A This allows both 8 bit and 16 bit selectable operation This manuai will provide information primarily on the 6a aide of the Model 16 For Z ag information that has not been include...

Page 6: ...TR5 S0 Mode1 16 Service Manual ItlIdIeIllaeli 6...

Page 7: ...or up ta 7 megabytes of memory Supports 8 levels of vectored interrupts Supports 4 levels of fixed priority bus arbitration Supports a Zsg ta MC68ggg memory interface controller The major components o...

Page 8: ...s space after bootup la complete The major components of the CPU Board include za A CPU Z8 A eTC za A DMA za A SIO Ploppy Diak Controller printer Interface Board The Floppy Disk Controller FOC Board p...

Page 9: ...tional boards include the following Hard Disk Interface Board 16K RAM bank selectable Interfaces te intelligent high speed eontroller l to 4 hard disk drives supported Major eomponents inelude 4116 16...

Page 10: ...nents include MCM6665 64X by l dynamic RAMa CRT Display Module The CRT display module has basically the same specifications as the Model II video monitor however increased bandwidth 22 MHz is provided...

Page 11: ...Strobes Clock Logic Refresh Logic Bus Errer Loqic Note The terms assertion and negation are used ta avold confusion when talking about active high or active low signaIs Assert or assertion iB used ta...

Page 12: ...rrides the TR control line and that both drivers and receivers are disabled tri stated if BGACK is asserted Address Linea The 68 address Iines are interfaced to the address bus via tranceivers U14 U33...

Page 13: ...up which always enab1es the drivers while the CO input is control1ed by BGACK which will disable tri state the drivers when an external device is bus master LOS indicates that data bits BO B07 are bei...

Page 14: ...outputs from the processor chip which feed a 3 to S decoder U6 U6 is used to detect accesses to User Space either code or data or to decode the Interrupt Acknowledge sequence INTAK Bus grant acknowled...

Page 15: ...or has stopped as iD the case of a double bus fault See Section 3 P za to 68 Meaory Interface Circuitry for more information Assertion of Bus Error BERR to the 68gg CPU indicates that a major error ha...

Page 16: ...y mode bit 2 GINT Polarity selected by mode bit 3 IREQ Polarity selected by mode bit 4 Mode bits 5 and 6 select which internaI reqister ta be read on a subsequent read operation Mode bit 7 ia the mast...

Page 17: ...outside the defined range Time out error generated when no DTACK is received with the 68 as the bus master Time out error generated when no DTACK i5 received and the 68 is not the bus mas ter parity e...

Page 18: ...pace ainee page zero cannat he disabled Additionally two control ports must he initialized ta determine the addresses involved and the mode of the transfer The two ports are described in the tables an...

Page 19: ...sserts uns CONTI 9 Enables ZS9 ta initiate memory transfers te or fram 68 J1J J memory space 1 Transfera by z89 disabled HALT J 681J J1J processor not halted l Halts 681J J J processor RESET J RESET n...

Page 20: ...controller is properly initialized There are two things that cause the generation of a bus error The user addresses outside his partition A bus time out occurs A bus time out results when nonexistent...

Page 21: ...wO 4 bit multiplexors LS157 select either the processor address KAl2 KAl9 or the User Extent Address UEAl2 UEAl9 to form the Effective Address EAl2 EAl9 MMA selects the address source and the upper pr...

Page 22: ...st S BRS with REFRQ having the highest priority and BRS the lowest The bus requests are pre latched by a quad D type latch U64 clocked at a l2 MHz rate The bus request is latched at a 0 output of U64...

Page 23: ...on controller will negate BGACK and allow the 68ggg CPU ta assume bus mastership See Figure 1 for the timing relationships of this circuit 12MHz 1 1 __ 1 Bus Request U64 3 4 6 11 REFRQ BRZ 1 BR1 BRO B...

Page 24: ...HIIDTACK ls asserted a read or welte ta an onboard device is in progresse If RIp i5 asserted an interrupt acknowledge cycle i5 in progress and the interrupt vector data i5 valld from the interrupt con...

Page 25: ...esponding device has been accessed and a time out error has occurred section 7 68 1 0 Decoding and Strobes The 1 0 devices in the 68 subsystem are memory mapped and consist of the lnterrupt controller...

Page 26: ...he output is connected ta the active high enable input U36 pin 6 KAS enables the third enable input U36 pin 4 when an active low oceurs KAI KA3 are decoded ta determine the output of U32 that selects...

Page 27: ...Mode1 16 Service Manual __________ TRS SC Il _ Q o u u Il Z e II l i en GO U l T 1 1 1 0 u 0 1 1 1 t1 1 0 t II 0 1 1 1 1 i Q U III CO Q II II II u III III c br i IItadIeIllaell 27...

Page 28: ...68SSg subsystem The h art of the clock logic is a 24 MHz crystal osci11ator See the top left hand corner of sheet 2 of the 68 CPU schematic The output of the 24 MHz oscillator is hooked to U63 pin 4 7...

Page 29: ...t of 124 which will equal 31 usec This configuration will generate less refresh bus request cycles thus allowing more CPU running time but to meet the 2 msec refresh specification two refresh pulses a...

Page 30: ...w 1 1 E E45Jum_ E E Jum 1 MODE REFRO I L I y 1 1 __ XO i J lO l 1 J Xl 1 X1 JI III L j 1 i Nohl Each block between slgnels equa s one Pf OP sI81ton de V Figure 4 Timing far Refreah Loglc...

Page 31: ...optiona1 byte parity for error detection It is designed for use with the 68 processor system The 68 has a l6 bit wide data bus and therefore the memory is 16 bits wide Because the MC68 needs to handle...

Page 32: ...he 6Sggg CPU i5 used ta distinguish between upper A l and lower A g bytes then AI A16 is required To save pins and chip size the IC s have only 8 address inputs Therefore the address lines are loaded...

Page 33: ...thin the 68 subsystern memory map allocation These address lines are connected to an 8 bit magnitude comparitor U2 LS68S which compares two S bit inputs The address lines are compared to a preset valu...

Page 34: ...1 li g 1 2cgllllll 2FFFFF X 1 1 X l g li 1 3l1l1l1l1l1 33FFFF X 1 li X li li 1 1 34l1l1l1l1 37FFFF X 1 1 X li g 1 1 38l1l1l1l1 3BFFFF X 1 g X 1 g 1 1 3Cgllllll 3FFFFF X 1 1 X 1 g 1 1 4l1l1l1l1l1 43FFF...

Page 35: ...h memory byte section The signal CAS is AND ed with disabled by REF to generate CASU and CASL the column Address strobe for each word section The signal R W is AND ed at U15 with UDSG to generate R W...

Page 36: ...logie 1 Mode1 16 TRs ao Service Manual If the parity is incorrect alogie S is strobed iota D flip flop U27 by AMUX This signal is then routed ta the selected system interrupt The signal is cleared by...

Page 37: ...mory boards and rerun the Model II diagnostics Locali ing the Trouble Localize the trouble ta the Model 16 68S CPU Board or the Model 16 128K 256K Memory Board by following the recommended actions in...

Page 38: ...in interface circuit Refer ta Trouble shooting the Model 16 Memory Board Refer ta Trouble Shooting the Model 16 CPU Board Troubleshootinq the Model 16 68 CPO Board Run Diagnostics Condition possible...

Page 39: ...d memory modified Possible l auit Clock loqic Interrupt circuit 68111111 CPU Clock logic Interrupt control1er rnterrupt circuit Offset Limi t registers U11 U32 or U16 Recommended Action Check ciock ci...

Page 40: ...U4l or U3g Check r o and strobe circuit TroubleshootiDq the Model 16 Meaory Board Run Diagnostics MOo16 Memory Modified Address Test Condition Bad RAM reported possible Pault Bad RAM Data buttera Addr...

Page 41: ...TRS SO Model 16 4 Printed Circuit Boards 68 CPt Board Service Manual ItadI8I11ae1l 41...

Page 42: ...Mode1 16 _____________ TRS SC s_e_r_v_i c e M an u a 1 _ Itad elllllell 1 H 1 c l il Ill 1 1 II l 1 42...

Page 43: ...Model 16 ___________ TRs aa s_e r v ic e M an u a l _ lladlelllaell 43...

Page 44: ...Hode1 16 _____________ TRS SO s_e_r_v_i_c_e H an u a 1 _ ltlldlelllaell 44...

Page 45: ...__________ TRS SC li _ Model 16 Service Manua IIad eIlllJell 45...

Page 46: ...l28K 256K Me ory Board T R S 8 0 Model 16 service Manual ItadIeIllllell 46...

Page 47: ...Model 16 Service Manual TRS BO ltadlelllaell 47...

Page 48: ...TRS SO Model 16 Service Manual ltadlOlhaeIl c _ oh _ 0 g 7 0 i t J J__o 1 i 48 1 l 1...

Page 49: ...Model 16 Service Manual TRS BO Z811 CPU Board IIadIeIllllell I mO c ln f q 0 m c Don i 1 49...

Page 50: ...Model 16 Service Manual T R 5 S 0 l t a d l e l h a e l l 5i1...

Page 51: ...Manual SerV1 ce Model 16 TRS SO ltadle1llaeK 51...

Page 52: ...Mode1 16 TRS SO s Ploppy Disk Board Service Manual y __ 0 t thl l lta tlelhaek 52...

Page 53: ...Mode1 16 TRS SO Service Manual 0 0 1 c H Il Il 1 fOlIOl 0 lC U 1 0100000 Ut l 0 0 0 I t c r J1 0 1 1 1 I t t 1 t HU lIa l1le Ihaek 53...

Page 54: ...TRs eo Model 16 Service Manual I le I 101 M J li IIi lil1 ICI 1 1 1 IQ1 IS1 lOi I J 1 1 1 181 IS1 11 lij1 181 le1 10 m rD 1 191 lil1 IQ1 101 Q 1010 W 191 IQ1 IQ1 m 1 191 181 IS1 101 m _ o aO 50 50 lt...

Page 55: ...Service M 4nua TRS SO _ Mode1 16 ltacheIhaek 55...

Page 56: ...Model 16 Service Manual TRS SO o ItMlHl1llaek 56...

Page 57: ...Video Board TRs eo s Model 16 Service Manual ItadIeIllllell 57...

Page 58: ...Model 16 TRS SD Service Mannal tadIeIMel 58...

Page 59: ...Mode1 16 Service Manual TRS SC IIadIeIhaell 1 11 59...

Page 60: ...TRs eo Model 16 Service Manual ltadlelllllell 611...

Page 61: ...Soeket 211 Pin DIP 8511911119 U34 Soeket 211 Pin DIP 8511911119 U44 Bocket 211 Pin DIP 85119Jl1l9 U49 Boeket 211 Pin DIP 8511911119 U57 Boeket 211 Pin DIP 85119l1l19 U611 Soeket 211 Pin DIP 85119l1l19...

Page 62: ...ial l UF 16V Electr Radial l UF l6V Electr Radial l UF 16V Electr Radial 4 7K Ohm 1 4 Watt 5 2 2K Ohm 1 4 Watt 5 4 7K Ohm 1 4 Watt 5 2 2K Ohm 1 4 Watt 5 2 2K Ohm 1 4 Watt 5 4 7K Ohm 1 4 Watt 5 22 K 9h...

Page 63: ...8PF SlIv C Disk 831111683 C36 ll1l1uF 16V Electr Radial 83271111 c37 ll1l1uF 16V Electr Radial 83271111 C38 ll1l1uF 16V Electr Radial 83271161 c39 ll1l1uF 16V Electr Radial 83271111 c411 ll1l1uF 16V E...

Page 64: ...1 AND OR Inverter 14 pin 74564 AND OR Inverter 14 Pin 7415148 Encoder 16 Pin MCM68 64 PIN 74LS283 Binary Full Adder 16 pin 74L5283 Binary Full Adder 16 pin 74564 AND OR Inverter 14 Pin 74564 AND OR In...

Page 65: ...OR 14 Pin 74L53p 8 IN NAND 14 Pin MCM3482A 8 Bit Latch Inv 2p Pin 74L5244 Octal Buffer 2p Pin 74LS74 Dual JK FLIP FLOP 14 pin 74586 Exclusive OR 14 PIN 74LS174 Rex D Type FLIP FLOP 16 pin 1G Bit CPU B...

Page 66: ...47 Socket 16 Pin 8511911113 U511 Socket 16 Pin 8511911113 U51 Socket 16 Pin 8511911113 U52 Socket 16 Pin 8511911113 U53 Socket 16 Pin 8511911113 U54 Socket 16 Pin 8511911113 U55 Socket 16 Pin 85119111...

Page 67: ..._ t l _...

Page 68: ...7451111 Quad 2 IN NAND 14 Pin 745118 Quad 2 IN AND 14 Pin 745111 Triple 3 IN NAND 14 pin 745111 Triple 3 IN NAND 14 Pin 74S 4 Rex Inverter 14 Pin 74537 Quad 2 IN NAND Buffer 14 Pin 74574 Dual JK FLIP...

Page 69: ...4 665 U65 MCM6665 Dynamic RAM 2 ns 16 pin 8 4 665 U66 MCM6665 Dynamic RAM 2 ns 16 Pin 8 4 665 U67 MCM6665 Dynamic RAM 2 ns 16 pin 8 4 665 El Jumper Plug 8519 21 E2 Jumper Plug 8519 21 El3 Jumper Plug...

Page 70: ...e 7 Nylon Cable Screw 8 X 3 8 Bracket Bezel Lower Bracket VIO MTG Bracket Bezel Upper Bracket Floppy Disk Panel Rear Connector Cable FDC Oisk Bus Plate Adaptor Screw 16 X 5 16 Caver Bottom OPOl P1ug C...

Page 71: ...oc Wiring Harness Video potentiometer 59iK Brightness potentiometer 59 Ohm Contrast Screw 832 X 3 4 PPH Washer 62500 2 3F Nut Lock 832 Label UL warning Screw t44jf X 3 4 ZN Tab Faston GRD M16 Washer...

Page 72: ...l CPU t 16 Bit Testing CPU t 16 Bit Re air CPU PCB 16 Bit F A FDC pea Subassy Jumper Plug8 1 IC Z811PIO Parallel 1 0 CONTR IC WD1791 2 Floppy Forrnatter IC WD1691 Floppy Formatter IC WD2143J l 4 Phase...

Page 73: ...crew 8 X 3 8 SHT MTL REX HO Label FCC ID M16 10R Label SIN CPU M16 10R Label Part lS FCC Clamp Cable Screw 832 X 3 8 Tie 5 Nylon Screw 832 X 1 4 Screw 8 X 3 8 ZN Washer 8 Star Screw 832 X 1 4 Washer 8...

Page 74: ...D Washer 8 Flat Screw 832 X 3 8 Tie 5 Nylon Tab Plastic 1 X 1 Case upper MOD 16 C Screw 832 X 1 2 PPH Iosert Disk Protector CPU MOD 16 Final Assy OP09 M16 IDR Burnin OPOl M16 IDR Test OPOll M16 IDR Q...

Page 75: ...TRs eo Madel 16 68111111 CPO Bo rd 128K 256 Memory Board zell CPO Board Ploppy Oisk Board zell M ory Board Video Board Service MaDual ItadIeIllaell 75...

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Page 80: ...111 m _ If l l D l OURAl O I DIll DOI 1OGl 1I I 01 DI TOI u _ aD _110 111 8bt QI 1_ __ _ nu PUonNCI llCI CI K Al I _ _ MODEl 16 BIT MEMORY BRD...

Page 81: ...1 T Il r 1 v 1 r 1 l l _ _J l l _ it L Ci88 o _n _ _ t _ aD a _ 710 m AI _ Y DlI UI _ 00 0 _ N ODEL 16 BIT MEMORY BOARD D 2...

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Page 86: ...TO C SUMPE Il A J UMPEI 6 CONTU tJEO 2 __ z 1 LoJ 7 tH 1 1 1 c 1 n i 104 AJ O 1 1 i tl _ h n J C 1 n n u n 0 QJ oa r _ _ _ _ J z J woj 1 0 0 t nO 1 l l1 J J 1 u 11 H c I DESIGN INTEIIF tE BOOfJ Z 1 R...

Page 87: ..._ 1 HI c C g t g c n CO CU G4e C ce ca 0 c O C ca c MEMORY l Il Il Il i l a i OOTZ DA 4 Il i l OU 1 11 75 1 O DA O 0 on 110 z _ V TERRI 3 _ _ __ _ _ t l f _ tWM T 5 r r U 1 l PItlPIIETARl IIfCRU nOl...

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Page 89: ...l 0 1 P I 1 T l C l _ __1 2 1 Q4 02S UQRIZ 8lI1 101TNfSS lO E R Il M CARO i5PTiOO i 1 K r r P f n t 1 REMOTE lUt o 1 BAllOIITNf5 S 1 SDDK 1 CDffT1l01 u 1 1 1 PI 3 4 4 __ I J 1 J 1 1 PI 7 1 0022 1 OH C...

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Page 92: ...A FORT WORTH TEXAS 76102 CANADA BARRIE ONTARIO L4M 4WS TANDY CORPORATION 8749400 AUSTRALIA 280 316 VICTORIA ROAD RYDAlMERE N S W 2116 BElGIUM PARC INOUSTRIEl DE NANINNE S14D NANINNE U K BllSTON ROAD...

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