Rabbit Rabbit 4000, User Manual

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Chapter 5 Memory Management 45
5.2 Dependencies
5.2.1 I/O Pins
There are three chip select pins: /CS0, /CS1, and /CS2; two read strobes, /OE0 and /OE1;
and two write strobes, /WE0 and /WE1.
There are eight dedicated data bus pins, D0 through D7. If the 16-bit mode is enabled, then
PD0–PD7 automatically act as the upper byte of the data bus, D8 through D15.
There are 20 dedicated address pins, A0 through A19. Up to four more address pins can be
enabled on PE0–PE3, representing A20 through A23.
Pin PE4 can be enabled as /A0 to allow byte reads and writes in 16-bit SRAM devices.
5.2.2 Clocks
All memory operations are clocked by the processor clock.
5.2.3 Other Registers
5.2.4 Interrupts
When a write is attempted to a write-protected 64KB or 4KB block, a write-protection
violation interrupt is generated. The interrupt request is cleared when it is handled. The
write-protection violation interrupt vector is in the IIR at offset 0x090. It is always set to
Priority 3.
When a stack-related write is attempted to a region outside that set by the stack limit regis-
ters, a stack limit violation occurs. The interrupt request is cleared when it is handled. The
stack limit violation interrupt vector is in the IIR at offset 0x1B0. It is always set to Priority 3.
Register Function
PEFR, PEALR Enable A20-A23 and /A0.