UMTS/HSPA Module Series
UG95 Hardware Design
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3.13. PCM and I2C Interface
UG95 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
following features:
Supports 8, 16, 32 bit mode with short frame synchronization
,
the PCM support 8 bit mode by default.
The PCM codec default configuration is
AT+QDAC=1
.
Refer to
document [1]
for more details.
Supports
master
mode
.
Supports
audio
sample
rate
8
kHz
.
The following table shows the pin definition of PCM and I2C interface.
Table 14: Pin Definition of PCM and I2C Interface
Pin Name
Pin No. I/O
Description
Comment
PCM_CLK
4
DO
PCM data bit clock
1.8V power domain
PCM_SYNC
5
DO
PCM data frame sync signal
1.8V power domain
PCM_IN
6
DI
PCM data input
1.8V power domain
PCM_OUT
7
DO
PCM data output
1.8V power domain
I2C_SCL
40
OD
I2C serial clock
Require external pull-up resistor
I2C_SDA
41
OD
I2C serial data
Require external pull-up resistor
CLK_OUT
25
DO
Clock output
Provide a digital clock output for
an external audio codec.
If unused, keep this pin open.
In PCM audio format the MSB of the channel included in the frame (PCM_SYNC) is clocked on the
second CLK falling edge after the PCM_SYNC pulse rising edge. The period of the PCM_SYNC signal
(frame) lasts for Data word bit +1 clock pulses.
UG95’s firmware has integrated the configuration on NAU8814/ALC5616/MAX9860 application with I2C
interface.
AT+ADQC
command is used to configure the external codec chip linked with PCM interface,
and refer to
document [1]
for more details. Data bit is 32 bit and the sampling rate is 8 KHz. The following
figure shows the timing of the application with ALC5616 codec.
Quectel
Confidential
