UMTS/HSDPA Module
UC15 Hardware Design
UC15_Hardware_Design Confidential / Released 33 / 72
Figure 13: Connection of UART port with hardware flow control
3.9.2. UART Application
The reference design of 3.3V level match is shown as below. When the peripheral MCU/ARM system is
3V,
the divider resistor should be changed from 3.6K to 6.8K.
MCU/ARM
/TXD
/RXD
1K
TXD
RXD
RTS
CTS
DTR
RI
/RTS
/CTS
GPIO
EINT
GPIO
DCD
Module
1K
1K
Voltage level:3.3V
3.6K
3.6K
3.6K
1K
1K
1K
1K
GND
GND
Figure 14: 3.3V level match circuit
The reference design of 5V level match is shown as below. The construction of dotted line can refer to the
construction of solid line. Please pay attention to direction of connection. Input dotted line of module
should refer to input solid line of the module. Output dotted line of module should refer to output solid line
of the module.
