Smart Module Series
SC690A_Series_Hardware_Design 65 / 105
impedance should be controlled to 85
Ω. Additionally, it is recommended to route the trace on the
inner layer of PCB, and do not cross it with other traces. For the same group of DSI or CSI signals,
all the MIPI traces should keep the same length. To avoid crosstalk, a distance of 1.5 times the
trace width among MIPI signal traces is recommended. During impedance matching, do not connect
GND on different planes to ensure impedance consistency.
⚫
It is recommended to select a low capacitance TVS for ESD protection and the recommended
parasitic capacitance should be below 1 pF.
⚫
Route MIPI traces according to the following rules:
a) The total trace length should not exceed 150 mm;
b) Control the differential impedance to 85
Ω ±10 %;
c) Control intra-pair length difference within 0.7 mm;
d) Control inter-pair length difference within 1.4 mm.
Table 24: MIPI Trace Length Inside the Module
Pin Name
Pin No
Length (mm)
Length Difference (P-N)
DSI_CLK_N
103
50.71
0.35
DSI_CLK_P
102
50.37
DSI_LN0_N
105
50.28
-0.30
DSI_LN0_P
104
50.58
DSI_LN1_N
107
50.32
0.32
DSI_LN1_P
106
50.00
DSI_LN2_N
109
50.20
-0.29
DSI_LN2_P
108
50.49
DSI_LN3_N
111
50.43
0.27
DSI_LN3_P
110
50.16
CSI0_CLK_N
78
20.54
0.28
CSI0_CLK_P
77
20.26
CSI0_LN0_N
80
20.75
0.00
CSI0_LN0_P
79
20.74
CSI0_LN1_N
82
20.79
0.35
