Smart Wi-Fi Module Series
SC20-WL Hardware Design
SC20-WL_Hardware_Design
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3.10. UART Interfaces
The module provides two UART interfaces:
UART1:
4-wire UART interface which supports hardware flow control
UART2:
2-wire UART interfaces and is used for debugging
Table 8: Pin Description of UART Interfaces
UART1 provides 1.8V logic level. A level translator should be used if customers
’ application is equipped
with a 3.3V UART interface. A level translator TXS0104EPWR provided by
Texas Instruments
is
recommended. The following figure shows the reference design.
VCCA
VCCB
OE
A1
A2
A3
A4
GND
B1
B2
B3
B4
LDO5_1V8
UART1_RTS
UART1_RXD
UART1_CTS
UART1_TXD
RTS_3.3V
RXD_3.3V
CTS_3.3V
TXD_3.3V
VDD_3.3V
TXS0104EPWR
C1
100pF
C2
U1
100pF
Figure 15: Reference Circuit with Level Translator Chip (for UART1)
Pin Name
Pin No
I/O
Description
Comment
UART1_TXD
34
DO
UART1 transmit data
1.8V power domain.
If it is unused, keep it open.
UART1_RXD
35
DI
UART1 receive data
1.8V power domain.
If it is unused, keep it open.
UART1_CTS
36
DI
UART1 clear to send
1.8V power domain.
If it is unused, keep it open.
UART1_RTS
37
DO
UART1 request to send
1.8V power domain.
If it is unused, keep it open.
UART2_RXD
93
DI
UART2 receive data.
Debug port by default.
1.8V power domain.
If it is unused, keep it open.
UART2_TXD
94
DO
UART2 transmit data.
Debug port by default.
1.8V power domain.
If it is unused, keep it open.
