LPWA Module Series
BG952A-GL_QuecOpen_Hardware_Design
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Figure 18: Main UART Reference Design (Transistor Circuit)
1. Transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps.
2. The UART interface should be disconnected in PSM and power off modes. Otherwise, the module
will have additional power consumption and may have damaged pins.
3. It is recommended to use a level-shifting chip without internal pull-up, such as TXB0108PWR, for
voltage level translation.
3.14. I2C Interface
*
The module provides two Inter-Integrated Circuit (I2C) interface for data communication. The interface
supports fast-mode plus and master mode only.
The pins of I2C interface are open drain and are multiplexed from GPIOs. The pull-up resistors should be
provided externally.
The pins of I2C interface are open drain that must be pulled up to 1.8 V. The pull-up resistors should be
provided externally.
The following figure shows a reference design of I2C interface with an external I2C interface sensor.
NOTES
NOTE